David Cordeau

Modeling and Characterization of Oscillator Circuits by Van der Pol Model using Parameter Estimation

In this paper, we present a new method for the modeling and characterization of oscillator circuit with a Van Der Pol (VDP) model using parameter identification. We also discussed and investigated the problem of estimation in nonlinear system based on time domain data. The approach is based on an appropriate state space representation of Van der Pol oscillator that allows an optimal parameter estimation. Using sampled output voltage signal, model parameters are obtained by an iterative identification algorithm based on Output Error method. Normalization issues are fixed by an appropriate transformation allowing a quickly global minimum search. Finally, the proposed estimation method is tested and validated using simulation data from a 1 GHz oscillator circuit in GaAs technology.

A 2.4 GHz active phase shifter architecture for smart antennas control

This paper aims at developing the bases of a smart radio-communication prototype, able to modify the radiation patterns, both on emission and reception, according to the needs of the communication. Smart antenna is a well-known concept, allowing to increase the quality of the transmission and spectral efficiency. To control the radiation patterns, algorithms used in smart antenna techniques require precise amplitudes and phases generation. In this paper, vector modulators working as active phase shifters will be used in order to synthesize such amplitudes and phases. A theoretical analysis will be performed in order to quantify the impact of vector modulators mismatches on the synthesized amplitudes and phases. Furthermore, measurements of radiation patterns generated by a prototype at 2.4 GHz will be presented.

A 2.4 GHz 1-dimensional array antenna driven by vector modulators

This paper aims to develop an intelligent radio-communication prototype using multiple-antenna phased array whose bearing can be controlled electronically. Such a system has proved its efficiency in terms of gain and SNR improvement. The architecture presented in this article runs at 2.4 GHz with a bandwidth channel of 11 MHz which is well suited for WIFI 802.11b applications. This original system uses quadrature modulators as active phase-shifters, and noise sensitivity is studied and simulated to prove the interest of this architecture. A circuit is under tests and first elementary active parts RF measurements are given.

A new class-C very low phase-noise Ku-band VCO in 0.25 µm SiGe:C BiCMOS technology

This paper presents a very low phase noise, fully integrated and differential Ku-band Voltage Controlled Oscillator (VCO) implemented in the QUBiC4X 0.25 μm SiGe:C BiCMOS process of NXP semiconductors. The originality of this design consists in using a new class-C architecture type. Under 5 V supply voltage and a maximum power dissipation of 123 mW, the proposed VCO features a worst case phase noise of -97 dBc/Hz at 100 kHz frequency offset from a 14.45 GHz carrier. The VCO is tuned from 13.59 GHz to 14.89 GHz with a tuning voltage varying from 1 V to 4.5 V and occupies 0.83×1.05 mm2.

A fully monolithic SiGe quadrature voltage controlled oscillator design for GSM/DCS-PCS applications

This paper describes the design and optimization in terms of phase noise of a fully monolithic SiGe Voltage Controlled Oscillator (VCO) with quadrature outputs. The proposed circuit is made of two cross-coupled differential VCOs, with integrated resonator, to ensure the quadrature outputs. The quadrature VCO core runs on 13 mA from a 2.7 V power supply. The simulated phase noise is about -140 dBc/Hz at 3 MHz frequency offset almost all over the tuning range. The oscillator is tuned from 1.44 GHz to 1.76 GHz with a tuning voltage varying from 0 to 3 V.

Graphical method for the phase noise optimization applied to a 6-GHz fully integrated NMOS differential LC VCO

This paper describes the design and the optimization in terms of phase noise of a fully integrated NMOS Voltage Controlled Oscillator (VCO) using a 0.25 μm BICMOS SiGe process. A three-dimensional phase noise analysis diagram and a graphical optimization approach is presented to optimize the phase noise of the VCO while satisfying design constraints such as tank amplitude, power dissipation, tuning range and start up conditions. At 2.5 V power supply voltage, the optimized VCO features a simulated phase noise of −118 dBc/Hz at 1 MHz frequency offset from a 6.12 GHz carrier. The VCO is tuned from 6.1 GHz to 7.9 GHz with a tuning voltage varying from 0 to 2.5 V, and a power dissipation of only 7.4 mW.

Design and implementation of a 6-GHz array of two differential oscillators coupled through a MOS transistor network

During the past decade, coupled oscillators have shown their efficiency as simple methods for phase control in microwave antenna arrays, and hence as alternatives to conventional electronic beam steering methods. This paper describes the design and the implementation of a fully monolithic coupled-oscillator array, operating at 6 GHz in 0.25 μm BICMOS SiGe process. A novel and original method, based on the use of a MOS transistor, for coupling the differential oscillators is developed and presented. At 2.5 V power supply voltage, and a power dissipation of only 62.5 mW, the coupled oscillators array features a simulated phase noise of -124.8 dBc/Hz at 1 MHz frequency offset from a 6.01 GHz carrier, giving a simulated phase progression that was continuously variable over the range -84 ° <; Δ□ <; 84 ° and -96° <; Δ□ <; 96°.

Generation of the coupling circuit parameters for the coupled oscillators used in antenna arrays

This paper presents a new software which can generate in full-symbolic or numeric-symbolic form the Y, Z, H, and fundamental parameters of a two-port structure. Our procedure can also determine all the resonant frequencies of any two-port configuration as functions of the two-port circuit parameters. The procedure is based on the modified nodal equations in full-symbolic form. A new software called ANCSYANP (Analog Circuit Symbolic Analysis Program) was elaborated. This is an interactive tool that combines symbolic and numeric computational techniques, and which uses the facilities of the symbolic simulator Maple to manipulate the symbolic expressions. An illustrative example is done.

Sensitivity and tolerance analysis for oscillator circuits simulated by Van der Pol models

The paper presents an improvement of sensitivity and tolerance analysis method for the Voltage-Controlled Oscillator (VCO) circuits with Van der Pol model. The tolerance analysis method is based on the Monte Carlo Analysis (MCA) and on the Fast Monte Carlo Analysis (FMCA) based on the circuit transfer function. The circuit sensitivities are computed by means of the derivatives of the circuit transfer functions. A practical and reliable approach has been developed and implemented in a computation program for linear (nonlinear piecewise-linearized) analog circuits. The circuits can contain any type of passive elements, independent and controlled sources. Powerful modified nodal approaches to build the mathematical model combined with some symbolic computation strategies have been exploited, in order to reduce the computational effort and to minimize the numerical errors. A software tool was conceived as a useful and valuable support for research and design engineers.

Analysis and design of a very low phase-noise Ku-band coupled VCO using a modified cascode architecture in 0.25 μm SiGe:C BiCMOS technology

Abstract This paper presents the theoretical principles and the measurement results of a fully integrated Ku-band coupled Voltage Controlled Oscillator (VCO) with very low phase noise, implemented in the QUBiC4X 0.25 μm SiGe:C BiCMOS process of NXP semiconductors. The originality of this design consists in using two coupled VCOs based on an original modified cascode architecture with a customized resonator using a back-to-back varactor configuration. Under 5 V supply voltage and a maximum power dissipation of 231.5 mW, the proposed VCO features a phase noise of −121.4 dBc/Hz at 1 MHz frequency offset. The VCO is tuned from 13.53 GHz to 14.79 GHz with a tuning voltage varying from 1 V to 4.5 V and occupies 0.84 × 1.85 mm2.