David Edward Borth

A flexible adaptive FIR filter VLSI IC

The architecture and features of the Motorola DSP56200 are described. The DSP56200 is an algorithm-specific cascadable digital signal processing peripheral designed to perform the computationally intensive tasks associated with finite impulse response (FIR) and adaptive FIR digital filtering applications. The DSP56200 is implemented in high-performance, low-power 1.5- mu m HCMOS technology and is available in a 28-pin DIP package. The on-chip computation unit includes a 97.5-ns 24-bit*24-bit coefficient RAM, and a 256-bit*16-bit data RAM. Three modes of operation allow the part to be used as a single, dual, or single adaptive FIR filter, with up to 256 taps per chip. In the adaptive mode, the part performs the FIR filtering and least-mean-square (LMS) coefficient update operations for a single tap in 195 ns, permitting use of the part as a 19-kHz sampling rate, 256-tap adaptive FIR filter. A programmable DC tap, coefficient leakage, and adaptation coefficient parameters in the adaptive FIR mode allow the DSP56200 to be used in a wide variety of adaptive FIR filtering applications. The performance of the part in an echo canceler configuration is presented. Typical applications of the part are also described. >

An experimental slow frequency-hopped personal communication system for the proposed U.S. 1850-1990 MHz band

An operational, prototype 1.8 GHz personal communication system employing the access technique of slow frequency-hopped CDMA is described. This system was designed to permit true vehicular/portable mobility with larger cells than conventional PCS proposals would allow while providing for the existence of a lower-cost PCS which would be operable in truly pedestrian-only environments. In the paper, the modem architecture, algorithms, and performance are discussed. The system has been found to yield excellent performance on a variety of channels characteristic of expanded PCS environment at a reasonable level of hardware complexity.An operational, prototype 1.8 GHz personal communication system employing the access technique of slow frequency-hopped CDMA is described. This system was designed to permit true vehicular/portable mobility with larger cells than conventional PCS proposals would allow while providing for the existence of a lower-cost PCS which would be operable in truly pedestrian-only environments. In the paper, the modem architecture, algorithms, and performance are discussed. The system has been found to yield excellent performance on a variety of channels characteristic of expanded PCS environment at a reasonable level of hardware complexity.

A comparison of nonlinear equalization methods for the US digital cellular system

Two forms of nonlinear equalization for the US digital cellular channel are considered. First, the decision feedback equalizer is examined. With the rapidly adapting recursive least squares algorithm, it is seen to adapt and track the channel with some error propagation problems. Second, the maximum likelihood sequence estimator (MLSE) with an adaptive channel estimator is developed. Simplifications are presented to reduce the complexity of the algorithm. An adaptive, predictive channel estimator is described which attempts to mitigate the effects of delay in the MLSE algorithm. Comparisons of performance and complexity are made.<<ETX>>

Signal processing aspects of Motorola's Pan-European digital cellular validation mobile

An experimental hardware system designed to permit evaluation of the European Conference of Post and Telecommunication Administrations (CEPT) Group Speciale Mobile (GSM) air interface standard is described. The system is a two-way radio link which operates as a fully functional mobile radiotelephone and permits both objective (bit error rate) and subjective (speech codec quality) performance measurements to be made. A complete description of the mobile radio system along with key aspects of the signal processing algorithms used therein is provided and performance results of the system in the presence of co-channel interference and multipath fading are given.<<ETX>>

Frequency hopped systems for PCS

The application of frequency hopping methods to cellular and personal communication systems (PCS) is studied. The performance enhancements due to the use of frequency hopping (FH) is initially reviewed followed by a brief summary of previously designed cellular/PCS systems that have incorporated FH methods. A slow frequency hop (SFH) prototype (which incorporated a hybrid form of multiple access, in particular slow frequency hopping CDMA combined with time division multiple access (TDMA)) was developed for PCS applications is then described. Performance results using the SFH prototype in laboratory and field trials are provided. These results demonstrate the excellent performance that may be obtained in PCS environments using a SFH architecture which has a complexity level that is suitable for PCS implementation.<<ETX>>

Hybrid Slow Frequency-Hop/CDMA-TDMA as a Solution for High-Mobility, Wide-Area Personal Communications

In order to provide a full range of personal communication services with wide-area coverage and high mobility, a macrocellular complement to microcellular PCS is defined. This system was designed to permit true vehicular/portable mobility with larger cells than conventional PCS proposals would allow while providing for the existence of a lower-cost PCS which would be operable in truly pedestrian-only environments. This macrocellular system employs the multiple access technique of slow frequency hopping to provide robust transmission over the harsh mobile radio channel and to maintain high capacity despite the use of larger cells. This paper discusses the alternatives considered in the definition of this system,highlighting choices which allow significant reductions in complexity without compromising system performance. In addition, channel models for frequency-hop systems are discussed and verified with field data. Using these models, the performance and capacity of the macrocellular system have been estimated on a variety of channels characteristic of the expanded PCS environment. The system has been found to offer excellent performance at a level of complexity suitable for PCS implementation.

A Digital Signal Processing Approach to Multichannel Television Sound Decoding

The introduction of the Multichannel TV sound standard by television broadcasters offers a new opportunity for digital audio. The system described in this paper offers a complete implementation of the BTSC MTS standard using digital signal processing techniques.

A cascadable adaptive FIR filter VLSI IC

This paper describes the architecture and features of the Motorola DSP56200, an algorithm-specific cascadable digital signal processing peripheral designed to perform the computationally intensive tasks associated with FIR and adaptive FIR digital filtering applications. The DSP56200 is implemented in high performance, low power 1.5µm HCMOS technology and is available in a 28 pin DIP package. The on-chip computation unit includes a 97.5 ns 24×16-bit multiplier with a 40-bit accumulator, a 256×24-bit coefficient RAM, and a 256×16-bit data RAM. Three modes of operation allow the part to be used as a single FIR filter, a dual FIR filter, or a single adaptive FIR filter, with up to 256 taps/chip. In the adaptive FIR filter mode, the part performs the FIR filtering and LMS coefficient update operations for a single tap in 195 ns, permitting use of the part as a 19 kHz sampling rate, 256 tap adaptive FIR filter. Programmable DC tap, coefficient leakage, and adaptation coefficient parameters in the adaptive FIR mode allow the DSP56200 to be used in a wide variety of adaptive FIR filtering applications. The performance of the part in an echo canceller configuration will be presented. Typical applications of the part will also be described.