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Dive into the research topics where David K. Lovelace is active.

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Featured researches published by David K. Lovelace.


international microwave symposium | 1994

Extracting small-signal model parameters of silicon MOSFET transistors

David K. Lovelace; Julio Costa; Natalino Camilleri

A novel approach to the extraction of small signal model parameters for silicon MOSFETs is described. This technique was developed to extract a high frequency model based only on S-parameter measurements to obtain both the intrinsic and parasitic resistance model parameter values of a small signal model.<<ETX>>


international microwave symposium | 1993

Silicon MOSFETs, the microwave device technology for the 1990s

Natalino Camilleri; Julio Costa; David K. Lovelace; D. Ngo

Silicon MOSFET technology using 1.5- mu m gate lengths has demonstrated excellent performance for 900-MHz applications. Circuit results for low-noise amplifiers, power amplifiers, mixers, and oscillators using this technology are discussed in comparison to other device technologies. Device results for 0.6- mu m-gate-length devices showing the microwave performance of silicon MOS transistors are discussed. These results, together with scaling predictions, indicate that microwave silicon MOSFETs will play a major role in the 1990s. The performance of devices with 0.6- mu m gate lengths indicates that silicon MOS will be the FET technology of choice for applications below 3 GHz. Advantages such as high voltage characteristics, low thermal conductivity of silicon, and the high operating junction temperature make silicon MOS a technology with immense potential for high-voltage X-band power applications.<<ETX>>


international microwave symposium | 1994

Bonding pad models for silicon VLSI technologies and their effects on the noise figure of RF NPNs

Natalino Camilleri; J. Kirchgessner; Julio Costa; D. Ngo; David K. Lovelace

VLSI technologies such as BiCMOS and high speed ECL Bipolar are candidates for mixed mode applications which include RF receiver functions. In order for these silicon technologies to achieve low noise characteristics one needs to optimize both the active device and the signal path to the IC interface. Studies in the bonding pad parasitics indicate that these path losses can be Very significant. This paper models the bonding pads and presents measured vs. modeled noise figure data for several bonding pad configurations.<<ETX>>


personal, indoor and mobile radio communications | 1995

Silicon MOSFET technology for RF ICs

David K. Lovelace; D. Ngo; Julio Costa; Natalino Camilleri

Application of silicon MOSFET technologies to high frequency RF transceiver functions will be presented. Starting with a description of the high frequency characteristics of silicon MOSFETs designed specifically for RF applications. These applications include several RF functions where silicon MOSFETs have not traditionally been used such as low noise amplifiers, balanced mixers, RF switches and integrated power amplifiers. Finally a description of the performance trade-offs associated with silicon BJT (Bipolar Junction Transistor) technology are given along with an evaluation of how BiCMOS (Bipolar-CMOS) technologies can sometimes serve as the best solution to RF IC designs. Another silicon MOSFET device well suited to RF applications is the Thin Film Silicon on Insulator (TFSOI) device [2] shown in Figure 2. This transistor is constructed in the same manner as the device in Figure 1 except that a layer of insulating dielectric is now present between the epi and the substrate. The buried oxide insulator dramatically reduces the source-substrate and drain-substrate capacitance that is inherent to classic MOSFET device architecture and i prohibits the use of a low impedance source ground contacts. 1 I \


international microwave symposium | 1993

Modeling a new generation of RF devices: MOSFETs for L-band applications

Julio Costa; David K. Lovelace; D. Ngo; Natalino Camilleri

Results on large-signal modeling efforts for a novel MOSFET technology for L-band RF applications are presented. A parameter extraction procedure which yields accurate RF MOS large-signal models using DC and S-parameter data is presented along with a comparison of measured and modeled class-B amplifier, mixer, and S-parameter data.<<ETX>>


radio frequency integrated circuits symposium | 2000

Low cost 900 MHz single-chip cordless telephone receiver

David K. Lovelace; S. Bader; J. Durec; R. Hester; K. Huehne; E. Main; P. Ovalle; M. Randol; R. Tang; D. Welty; R. Williams; K. Wortel

A low cost 900 MHz single-chip cordless telephone receiver is presented, This IC is suitable for 900 MHz portable wireless applications including cordless telephone. Receiver functions are programmed through a serial port interface (SPI), The receiver IC can be operated either as a single conversion or dual conversion receiver with a 12 dB SINAD of -115 dBm. Power consumption is rated at 20 mA of supply current operating from 1.8 V to 2.8 V. This IC utilizes a 0.4 /spl mu/m BiCMOS process and features an LNA, two mixers, IF amplifier, IF limiter, demodulator, VCO, crystal reference oscillator, PLL, and an 80 bit SPI. All of these functions have been integrated onto a 1.09 mm/spl times/1.08 mm (1.18 mm/sup 2/) die.


international microwave symposium | 1998

Sub-micron silicon RF IC technologies: "an overview"

David K. Lovelace; J. L. Finol; Jeff Durec

Silicon based semiconductors have become the standard active device technology of choice in todays cost and performance driven consumer wireless products. No longer is silicon technology confined to low frequency analog and digital processing functions. Silicon devices have now reached high frequency performance levels which allow them to be used almost exclusively in the RF section of many wireless communication circuits. This paper deals with the issues involved in employing silicon IC technologies to low cost, low power, RF circuits.Silicon based semiconductors have become the standard active device technology of choice in todays cost and performance driven consumer wireless products. No longer is silicon technology confined to low frequency analog and digital processing functions. Silicon devices have now reached high frequency performance levels which allow them to be used almost exclusively in the RF section of many wireless communication circuits. This paper deals with the issues involved in employing silicon IC technologies to low cost, low power, RF circuits.


international microwave symposium | 1994

Modeling and measurement of 1/f noise characteristics of silicon BJTs

Julio Costa; D. Ngo; Robert Jackson; David K. Lovelace; Natalino Camilleri; J. Jaffee

We present a method for measuring and extracting the BJT SPICE noise model parameters AF and KF based on an analysis of the general small signal equivalent circuit and the role of the BJT noise sources. Modeled and measured low-frequency noise data is presented for three high-frequency Motorola bipolar technologies.<<ETX>>


radio frequency integrated circuits symposium | 2001

High performance flip-chip multi-mode, multi-band VCO IC using a standard low cost BiCMOS process

David K. Lovelace; Ray Disilvestro

A low cost, high performance flip-chip multi-mode, multi-band voltage controlled oscillator (VCO) IC is presented. This IC is suitable for high performance VCO circuits over a wide range of frequencies. A novel noise reduction circuit technique is used to obtain improved phase noise performance without the use of a higher cost SiGe BiCMOS processes. This IC has a measured phase noise of -162 dBc/Hz at a 20 MHz offset operating at an oscillation frequency of 900 MHz with an output power of +10 dBm.


radio frequency integrated circuits symposium | 2003

High linearity CMOS SOI mixer

David K. Lovelace; D. Losser; David Kelly

This paper describes the design of a single-ended CMOS SOI mixer with very high linearity. The mixer delivers +23dBm of IIP3 with a conversion loss of 6.5dB at an RF frequency of 1.9GHz, at an LO drive of 0dBm and a bias current of 6.3mA at 3V/sub DC/. The mixer is fabricated in a 0.5 /spl mu/m CMOS SOI process and operates over a frequency range of 900MHz to 2.4GHz drawing 6-8mA of supply current (dependant on LO drive) at a DC supply of only 3V. The chip size is 466 /spl mu/m /spl times/ 606 /spl mu/m and is housed in a six lead SOT-23 package.

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