David Koh

Profiler-based optimization of automatically generated code

Automatic generation of component interfaces for computational hardware implementations generated from a block diagram model

Memory mapping for single and multi-processing implementations of code generated from a block diagram model

Optimization of cache configuration for application design

Reporting of aspects and partitioning of automatically generated code according to a partitioning scheme

Automatic generation of cache-optimized code

Automatic numerical simulation of processor environment

Framework for hardware co-simulation by on-demand invocations from a block model diagram design environment

Pairing a physical device with a model element

Modifying models based on profiling information