Davide Resca

Scalable Nonlinear FET Model Based on a Distributed Parasitic Network Description

Electron device modeling requires accurate descriptions of parasitic passive structures connecting the intrinsic electron device to the external world. In conventional approaches, the parasitic phenomena are described by a network of lumped elements. As an alternative, a distributed description can be conveniently adopted. This choice has been proven very appropriate when dealing with device scaling and very high operating frequencies. In this paper, a novel approach to distributed parasitic modeling is adopted for the very first time in association with a nonlinear electron device model. In particular, it is shown how an equivalent intrinsic device and a suitably defined distributed parasitic network can be accurately defined and modeled on the basis of standard measurements and easy electromagnetic simulations. Wide experimental validation based on GaAs pseudomorphic HEMTs is provided, showing accurate prediction capabilities both under small- and large-signal conditions. The proposed model is shown to perform optimally even after periphery scaling.

Scalable Equivalent Circuit FET Model for MMIC Design Identified Through FW-EM Analyses

A scalable approach to the modeling of millimeter- wave field-effect transistors is presented in this paper. This is based on the definition of a lumped extrinsic parasitic network, easily scalable with both the number of fingers and the finger widths. The identification of the extrinsic network parameters is carried out by means of accurate full-wave electromagnetic simulations based on the layout of a single reference device. In the paper, the parasitic effects of the gate/drain manifolds and of the source layout are investigated, leading to the definition of realistic linear scaling rules. The obtained model is experimentally validated by using a family of 0.25-mum millimeter-wave GaAs pseudomorphic HEMTs through the accurate prediction of critical performance indicators, such as the linear maximum power gain or the stability factor. Despite the simplicity of the proposed model, it proves to be as accurate as typical scalable models provided by foundries. Straightforward application of the scalable modeling approach to the optimum device geometry selection in a typical design problem is also presented.

GaN HEMT Noise Model Based on Electromagnetic Simulations

This paper presents a new approach for the definition and identification of a transistor model suitable for low-noise amplifier (LNA) design. The resulting model is very robust to layout modifications (i.e., source degeneration) providing accurate predictions of device noise-performance and small-signal parameters. Moreover, the described procedure is very robust since it does not require any numerical optimization, with possibly related problems like local minima and unphysical model parameters. The adopted model topology is based on a lumped element parasitic network and a black-box intrinsic device, which are both identified on the basis of full-wave electromagnetic simulations, as well as noise and S-parameter measurements. The procedure has been applied to three GaN HEMTs having different peripheries and a Ku-band LNA has been designed, demonstrating a very good agreement between measurements and predicted results.

Accurate EM-Based Modeling of Cascode FETs

Cascode field-effect transistors (FETs) are widely used in the design of monolithic microwave integrated circuits (MMICs), owing to their almost unilateral and broadband behavior. However, since a dedicated model of the cell is rarely provided by foundries, a suboptimal description built by replicating the standard foundry model for both the common source and common gate device is often adopted. This might limit the success of the MMIC design at the first foundry run. This paper describes an electromagnetic-based empirical model of cascode cells, covering topics from the formulation and identification procedures to the corresponding validation described in an exhaustive experimental section. A MMIC low-noise distributed amplifier case is then presented and the proposed model is used for circuit analysis and instability detection. Clear indication is provided about the improvement in the prediction of critical behaviors with respect to conventional modeling approaches. A cascode cell with a symmetric layout is also successfully modeled.

X-Band GaN Power Amplifier for Future Generation SAR Systems

A X-band GaN monolithic microwave integrated circuits (MMIC) High Power Amplifier (HPA) suitable for future generation Synthetic Aperture Radar systems is presented. The HPA delivers 14 W of output power, more than 38% of PAE in the frequency bandwidth from 8.8 to 10.4 GHz. Its linear gain is greater than 25 dB. For the first time an MMIC X-band HPA has been designed by directly measuring the transistor behavior at the current generator plane. In particular, optimum device load-line has been selected according to the chosen performance tradeoffs.

Extraction of an extrinsic parasitic network for accurate mm-Wave FET scalable modeling on the basis of Full-Wave EM simulation

This paper describes a new methodology for the extraction of an extrinsic parasitic network suitable for scalable electron device models. The extraction procedure is based on the data obtained through Full-Wave Electro-Magnetic (FW-EM) analyses of the passive structure of a reference device. The new topology proposed proves to be scalable according to simple linear rules derived from geometric considerations. This new parasitic network is used together with a scalable intrinsic device model in order to predict the behavior of different 0.25 μm GaAs PHEMTs (total gate-widths between 300 and 900 μm) belonging to a standard process for millimeter-wave applications. Better accuracy with respect to conventional modeling approaches, is proved up to 80 GHz.

Scalable equivalent circuit PHEMT modelling using an EM-based parasitic network description

Electron device modelling requires the accurate identification of a suitable parasitic network accounting for the passive structures which connect the intrinsic electron device to the external world. In conventional approaches, the parasitic network is described by a proper topology of lumped elements. As an alternative, a distributed description of the parasitic network can be conveniently adopted. In particular, the latter solution is the better choice when dealing with device scaling and very high operating frequencies. In this paper the parasitic network is described by means of a suitable distributed network identified through electromagnetic simulations of the device layout. It is shown how the adoption of a distributed instead of a lumped description leads to a more accurate equivalent-circuit-based electron device model. The good scalability properties of the approach are also presented through experimental results.

A distributed approach for millimetre-wave electron device modelling

Electron device modelling at very high frequencies needs, as a preliminary step, the identification of suitable parasitic elements mainly describing the passive structure used for accessing the intrinsic device. However, when dealing with device modelling at millimetre-wave frequencies conventional lumped parasitic networks necessarily become less adequate in describing inherently distributed parasitic phenomena. In this paper, a distributed approach is adopted for the modelling of the parasitic network and a new identification procedure, based on electromagnetic simulation and conventional S-parameter measurements, is proposed. The intrinsic device, obtained after de-embedding from the distributed parasitic network, is particularly suitable for the extraction of accurate nonlinear models. Preliminary validation results are provided in the paper

A GaN MMIC chipset suitable for integration in future X-band spaceborne radar T/R module Frontends

A set of monolithic microwave integrated circuits (MMICs) has been successfully developed by using a qualified European GaN HEMT technology. In particular a high power amplifier (HPA), a low noise amplifier (LNA) and a single pole double throw (SPDT) switch have been designed, manufactured and tested. The presented chipset is very suitable for integration in future GaN-based T/R module Frontend for spaceborne X-band SAR applications. In particular, the MMIC HPA integrates two stages of gain in 5.5 × 4.0 mm2 of area. Its measured performance is an output power of 27 W, a PAE of 36% with a linear gain greater than 24 dB from 8.8 GHz to 10.2 GHz. The MMIC LNA integrates three stages of gain in 3.0 × 2.02 mm2 of area. Its measured performance is a small signal gain greater than 23 dB with an associated noise figure of 1.6 dB in the frequency range from 7.4 to 11.4 GHz. Besides, its output power at 1 dB of gain compression is greater than 22 dBm. The MMIC SPDT switch exploits a robust asymmetrical absorptive/reflective topology in 3.0 × 1.0 mm2 of area. The chosen topology allows obtaining different functionalities of each switched branch. In the frequency range from 8.4 GHz to 10.8 GHz its measured performance is an insertion loss lower than 1 dB for both tx and rx path, and tx-mode rx-mode isolations better than 20 dB and 28 dB respectively. Besides, the tx path 1 dB insertion loss compression occurs at nearly 20 W of input power.

Accurate Nonlinear Electron Device Modelling for Cold FET Mixer Design

A nonlinear empirical model is here adopted to model the cold-FET behaviour of a GaAs PHEMT, in the framework of a resistive mixer application. The model, purely mathematical and technology independent, is suitably identified in the device operative region of interest and is validated in large-signal conditions by exploiting a measurements setup based on LS-VNA.