Debaleen Biswas

Optimization of annealing temperature for high-κ-based gate oxides using differential scanning calorimetry

This study investigates the crystallization process for thin high-κ dielectric films and optimal annealing temperature range in the field of high-κ dielectric-based metal-oxide-semiconductor (MOS) technology. A differential scanning calorimetry (DSC) technique is employed to understand the thermal behavior of thin high-κ dielectric HfO2 films deposited on Si by radio frequency sputtering. The exothermic trends of the DSC signal and grazing incidence x-ray diffraction data indicate an amorphous-to-crystalline transition in the high-κ films at higher temperatures. The enthalpy-temperature variation indicates a glass temperature (Tg) at ∼590 °C, beyond which an amorphous to m-HfO2 crystalline transition takes place. Further, the Hf-silicate formation, observed in DSC measurements and corroborated by Fourier transformed infrared spectroscopy studies, indicates that the process of Hf-silicate formation begins at ∼717 °C. High-frequency capacitance–voltage (C–V) and current density–voltage (J–V) characteristics...

Effect of thermal annealing and oxygen partial pressure on the swelling of HfO2/SiO2/Si metal-oxide-semiconductor structure grown by rf sputtering: A synchrotron x-ray reflectivity study

As-grown and rapid thermal annealed thin HfO2 films, deposited on Si(100) substrate by reactive rf sputtering at various partial pressures of O2 and Ar, are studied by synchrotron x-ray reflectivity. The growth of interfacial layer (IL) of SiO2 is more or less linear with the decrease in oxygen partial pressure ( pO2) in the O2/Ar mixture. The thickest oxide is found to be grown at the minimum oxygen partial pressure ( pO2). It is observed that the IL swells upon annealing at higher temperature, and swelling is maximum for the sample grown in minimum pO2. The surface roughness and thickness of the HfO2 films decrease upon annealing indicating a denser film. The HfO2/Si interface roughness is also decreased upon annealing. Therefore, lower annealing temperature and higher pO2 is to be set to reduce the IL thickness and for higher dielectric constant and larger oxide capacitance. High frequency capacitance-voltage (C–V) measurement on the devices, annealed at higher temperature, further shows the necessity ...

Effect of excess hafnium on HfO2 crystallization temperature and leakage current behavior of HfO2/Si metal-oxide-semiconductor devices

This article reports the role of excess Hf on the crystallization temperature of thin HfO2 film and leakage current behavior of Hf-rich HfO2/Si metal-oxide-semiconductor (MOS) devices. The HfO2 thin-films deposited by the radio-frequency sputtering system with different Ar:O2 gas mixtures are studied by differential scanning calorimetry. The crystallization temperature of Hf-rich HfO2 film is found to be lower than that of the HfO2 film. The grazing incidence x-ray diffraction studies also confirm the above observation. X-ray photoelectron spectroscopy study further indicates the presence of excess Hf in the oxide film. Enhanced structural relaxation in the presence of excess Hf in HfO2 film releases energy, already stored within the film during deposition, which is responsible for lowering of crystallization temperature. The gate leakage current characteristics are deteriorated in the presence of excess Hf in the HfO2/Si MOS device.

Influence of rapid thermal annealing on electrical performance and reliability of HfO2 based MOS device

The stability of dielectric properties of the thin film under high voltage stress and variation of electrical behavior with the rapid thermal annealing (RTA) of thin HfO2 dielectric film (∼ 7.5 nm) based MOS devices are studied by gate current – gate voltage (I-V), high frequency (HF) capacitance – voltage (C-V) characteristics. The device fabricated using high temperature annealed films shows better and stable performance under high voltage stress due the crystallization of the films.

Deposition and characterization of vanadium oxide based thin films for MOS device applications

Vanadium Oxide films are deposited on Si (100) substrate by reactive RF-sputtering of a pure Vanadium metallic target in an Argon-Oxygen plasma environment. The ratio of partial pressures of Argon to Oxygen in the sputtering-chamber is varied by controlling their respective flow rates and the resultant oxide films are obtained. MOS Capacitor based devices are then fabricated using the deposited oxide films. High frequency Capacitance-Voltage (C-V) and gate current-gate voltage (I-V) measurements reveal a significant dependence of electrical characteristics of the deposited films on their sputtering deposition parameters mainly, the relative content of Argon/Oxygen in the plasma chamber. A noteworthy change in the electrical properties is observed for the films deposited under higher relative oxygen content in the plasma atmosphere. Our results show that reactive sputtering serves as an indispensable deposition-setup for fabricating vanadium oxide based MOS devices tailor-made for Non-Volatile Memory (NVM) applications.Vanadium Oxide films are deposited on Si (100) substrate by reactive RF-sputtering of a pure Vanadium metallic target in an Argon-Oxygen plasma environment. The ratio of partial pressures of Argon to Oxygen in the sputtering-chamber is varied by controlling their respective flow rates and the resultant oxide films are obtained. MOS Capacitor based devices are then fabricated using the deposited oxide films. High frequency Capacitance-Voltage (C-V) and gate current-gate voltage (I-V) measurements reveal a significant dependence of electrical characteristics of the deposited films on their sputtering deposition parameters mainly, the relative content of Argon/Oxygen in the plasma chamber. A noteworthy change in the electrical properties is observed for the films deposited under higher relative oxygen content in the plasma atmosphere. Our results show that reactive sputtering serves as an indispensable deposition-setup for fabricating vanadium oxide based MOS devices tailor-made for Non-Volatile Memory (NVM)...

Development of a linear temperature ramp-based automated system for furnace oxidation of semiconductor wafers

This article presents a custom-made, stepper motor controlled instrument to load/unload wafer/substrate into a furnace for its oxidation and/or annealing where the wafer experiences a linear temperature ramp up/down rate. Such an instrument takes care of the nonlinear spatial variation of temperature in different segments along the length of a furnace. A technique for controlling stepper motor using arduino board is proposed. A MATLAB-based graphical user interface (GUI) is also developed for its automated operation. The ramp up or ramp down rate, measured by a thermocouple, attached to the wafer carrier, is controlled precisely by changing the speed of the carrier during its insertion or withdrawal, respectively. A mathematical expression is used to deal with the non-linear variation of temperature along the length of the tube furnace and accordingly, the insertion/withdrawal speed of the sample carrier is set. Therefore, a linear ramp rate from initial to final temperature is achieved by varying the linear motion of the sample carrier in different segments for all furnace temperature. A linear ramp rate ranging from < 1°C/min to 370°C/min may be set as per the requirements of the oxidation or annealing process.

Determination of annealing of temperature HfO2/Si metal-oxide-semiconductor devices

Thermal behavior of thin high-k dielectric films (∼ 8.4 nm) of HfO2, deposited by reactive rf-sputtering technique on n-type Si (100) wafer, is studied by thermogravimetry (TG) and Differential Scanning Calorimetry (DSC) techniques. DSC results reflect partial crystallization of the film which starts at 250 °C and another transformation begins beyond 670 °C. The high-frequency (HF) capacitance - voltage (C-V) characteristics, measured for all the devices, annealed at different temperatures also corroborate the above observation.