Devin Alexander Mourey

Passivation of Amorphous Oxide Semiconductors Utilizing a Zinc–Tin–Silicon–Oxide Barrier Layer

Sputter-deposited amorphous zinc-tin-silicon-oxide (ZTSO) is demonstrated to be a viable electronic passivation layer for bottom-gate thin-film transistors (TFTs) with amorphous zinc-tin-oxide and indium-gallium-zinc-oxide channels. ZTSO allows for successful passivation of these semiconductors without significant changes in turn-on voltage, hysteresis, or channel mobility that is commonly associated with unsuccessful passivation of amorphous oxide semiconductors (AOSs). Passivation of AOS TFTs using ZTSO significantly increases electrical stability under negative-bias illumination stress testing conditions compared with unpassivated AOS TFTs. ZTSO also acts as a barrier layer allowing for additional postprocessing (e.g., plasma-enhanced chemical vapor deposition processes) that in some cases can negatively effect an unprotected AOS layer.

Roll-to-roll fabrication and metastability in metal oxide transistors

A roll-to-roll process is used to fabricate amorphous silicon and amorphous multicomponent oxide (MCO) transistors on flexible substrates using self aligned imprint lithography (SAIL). SAIL solves the layer to layer alignment problem. The imprint lithography patterned MCO transistors had a mobility of 15 cm2V-1 sec-1 and an on-off ratio of 107. Full display arrays with data, gate, hold capacitors and cross-overs were patterned using SAIL technology. Studies of stability of the MCO transistors indicate the importance of controlling O vacancies in the material particularly the back channel. Devices subjected to -10V gate bias stress at 60C under illumination exhibited behavior consistent with state creation in the upper and lower half of the gap near the back channel interface possibly associated with O vacancy formation.