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Featured researches published by Didier Bert.
formal methods | 2003
Didier Bert; Sylvain Boulmé; Marie-Laure Potet; Antoine Requet; Laurent Voisin
This paper presents the results of the RNTL BOM project, which aimed to develop an approach to generate efficient code from B formal developments. The target domain is smart card applications, in which memory and code size is an important factor. The results detailed in this paper are a new architecture of the translation process, a way to adapt the B0 language in order to include types of the target language and a set of validated optimizations. An assessment of the proposed approach is given through a case study, relative to the development of a Java Card Virtual Machine environment.
integrated formal methods | 2000
Didier Bert; Francis Cave
In this paper, we investigate how to represent the behaviour of B abstract systems by finite labelled transition systems (LTS). We choose to decompose the state of an abstract system in several disjunctive predicates. These predicates provide the basis for defining a set of states which are the nodes of the LTS, while the events are the transitions. We have carried out a connection between the B environment (Atelier B) and the Caesar/Aldebaran Development Package (CADP) which is able to deal with LTS. We illustrate the method by developing the SCSI-2 (Small Computer Systems Interface) input-output system. Finally, we discuss about the outcomes of this method and about its applicability.
Lecture Notes in Computer Science | 2005
Didier Bert; Marie-Laure Potet; Nicolas Stouls
In this paper, we present a method and a tool to build symbolic labelled transition systems from B specifications. The tool, called GeneSyst, can take into account refinement levels and can visualize the decomposition of abstract states in concrete hierarchical states. The resulting symbolic transition system represents all the behaviors of the initial B event system. So, it can be used to reason about them. We illustrate the use of GeneSyst to check security properties on a model of electronic purse.
integrated formal methods | 2002
Héctor Ruíz Barradas; Didier Bert
We present a proposal of specification and proof of liveness properties in B event systems under fairness assumptions. We give proof obligations in order to prove basic progress properties in B event systems under two types of assumptions: minimal progress and weak fairness. We define proof obligations in terms of weakest preconditions, which allow us to prove basic liveness properties as usual B proof obligations.We suggest the use of unity Leads To operator to specify more general liveness properties. In this way, we integrate the unity logic in the specification and proof of B event systems.
Journal of Network and Computer Applications | 2002
Stéphane Lo Presti; Didier Bert; Andrzej Duda
This paper presents TAO: a language based on Temporal Algebraic Operators for composing complex multimedia presentations. Unlike traditional approaches used to specify multimedia presentations, TAO relies on a well-defined semantics with an underlying temporal model based on intervals and causal relations between time points. We derive some properties of TAO presentations and show how to execute TAO presentations on an execution engine: a TAO presentation is compiled into a set of instructions interpreted by the execution engine.
Technique Et Science Informatiques | 2004
Frédéric Badeau; Didier Bert; Sylvain Boulmé; Christophe Métayer; Marie-Laure Potet; Nicolas Stouls; Laurent Voisin
Cet article presente quelques resultats du projet RNTL BOM (B Optimisant la Memoire). Le but etait dobtenir un traducteur du langage B vers le langage C, facilement adaptable a des contraintes memoire (logiciels embarques sur cartes a puce). Nous proposons une methode dextension des types de base permettant dinclure certains types du langage cible. Nous presentons comment le traducteur est decrit sous forme de regles de traduction pour permettre dadapter la traduction aux plates-formes cibles. Nous indiquons une demarche pour assurer la correction du code produit. Nous terminons par quelques mesures de taille de code genere pour la machine virtuelle Java Card.
Archive | 1996
Didier Bert; Marie-Laure Potet; Yann Rouzaud
arXiv: Logic in Computer Science | 2005
Héctor Ruíz Barradas; Didier Bert
TSI. Technique et science informatiques | 2004
Frédéric Badeau; Didier Bert; Sylvain Boulmé; Christophe Métayer; Marie-Laure Potet; Nicolas Stouls; Laurent Voisin
Lecture Notes in Computer Science | 2003
Didier Bert; Sylvain Boulmé; Marie-Laure Potet; Antoine Requet; Laurent Voisin