Dimitris Apostolopoulos

40-Gb/s All-Optical Processing Systems Using Hybrid Photonic Integration Technology

This paper presents an experimental performance characterization of all-optical subsystems at 40 Gb/s using interconnected hybrid integrated all-optical semiconductor optical amplifier (SOA) Mach-Zehnder interferometer (MZI) gates and flip-flop prototypes. It was shown that optical gates can be treated as generic switching elements and, when efficiently interconnected, can form larger and more functional network subsystems. Specifically, this paper reports on all-optical subsystems capable of performing on-the-fly packet clock recovery, 3R regeneration, label/payload separation, and packet routing using the wavelength domain. The all-optical subsystems are capable of operating with packet-mode traffic and are suitable for all-optical label-switched and self-routed network nodes. The intelligent functionality offered, combined with the compactness and stability of the optical gates, verifies the potential that all-optical technology can find application in future data-centric networks with efficient and dynamic bandwidth utilization. This paper also reports on the latest photonic integration breakthroughs as a potential migration path for reducing fabrication cost by developing photonic systems-on-chip utilizing multiple SOA-MZI optical gates on a single chip

All-Optical 3R Burst-Mode Reception at 40 Gb/s Using Four Integrated MZI Switches

We demonstrate an all-optical retime, reshape, reamplify (3R) burst-mode receiver (BMR) operating error-free with a 40-Gb/s variable-length asynchronous optical data packets that exhibit up to 9-dB packet-to-packet power variation. The circuit is completely based upon hybrid integrated Mach-Zehnder interferometric (MZI) switches as it employs four cascaded MZIs, each one performing a different functionality. The 3R burst-mode reception is achieved with the combination of two discrete all-optical subsystems. A reshape, reamplify BMR employing a single MZI is used first to perform power equalization of the incoming bursts and provide error-free data reception. This novel approach is experimentally demonstrated to operate error-free, even for a 9-dB dynamic range of power variation between bursty data packets and for a wide range of average input power. The obtained power-equalized data packets are then fed into a 3R regenerator to improve the signal quality by reducing the phase and amplitude jitter of the incoming data. This packet-mode 3R regenerator employs three MZIs that perform wavelength conversion, clock extraction, and data regeneration for every packet separately and operates at 40 Gb/s, exhibiting rms timing jitter reduction from 4 ps at the input to 1 ps at the output and a power penalty improvement of 2.5 dB

Photonics in switching: enabling technologies and subsystem design

This paper describes recent research activities and results in the area of photonic switching carried out within the framework of the EU-funded e-Photon/ONe+ network of excellence, Virtual Department on Optical Switching. Technology aspects of photonics in switching and, in particular, recent advances in wavelength conversion, ring resonators, and packet switching and processing subsystems are presented as the building blocks for the implementation of a high-performance router for the next-generation Internet.

On-the-Fly All-Optical Contention Resolution for NRZ and RZ Data Formats Using Packet Envelope Detection and Integrated Optical Switches

We present a packet-by-packet contention resolution scheme that combines packet detection, optical space switching, and wavelength conversion performed in the optical domain by integrated optical switches. The packet detection circuit provides the control signals required to deflect and wavelength-convert the contending packets so that all the packets are forwarded to the same output without any collision or packet droppings. We demonstrate the compatibility of the scheme with both nonreturn-to-zero (NRZ) and return-to-zero (RZ) modulation formats by recording error-free operation for 10-Gb/s NRZ and 40-Gb/s RZ packet-mode traffic

Cascadability Performance Evaluation of a New NRZ SOA-MZI Wavelength Converter

We evaluate the cascadability performance of a new semiconductor optical amplifier (SOA) Mach-Zehnder interferometer-based nonreturn-to-zero wavelength converter in a loop experiment. We use the bidirectional data injection control scheme with an additional continuous-wave signal to optimize the gains and phases imparted by the SOAs. The scheme has been shown to be capable of eight cascaded, error-free wavelength conversions at 10 Gb/s.

Contention Resolution for Burst-Mode Traffic Using Integrated SOA-MZI Gate Arrays and Self-Resetting Optical Flip-Flops

We demonstrate a photonic routing system that resolves the contention between bursty optical packets. The circuit is realized exclusively with integrated photonic components through the interconnection of semiconductor optical amplifier Mach-Zehnder interferometers gate arrays and optical flip-flops. The system resolves the contention - without burst segmentation - in the wavelength domain with a low power penalty ( < 1 dB).

All-Optical Label/Payload Separation at 40 Gb/s

We demonstrate an all-optical label/payload separation circuit implemented with hybridly integrated semiconductor-optical-amplifier-based Mach-Zehnder switches. It is shown to operate error-free with 40-Gb/s variable length data packets containing 27-1 pseudorandom bit sequence and short guardbands between them. The circuit requires only the data packets as input and its complexity does not increase with label length

First demonstration of active plasmonic device in true data traffic conditions: ON/OFF thermo-optic modulation using a hybrid silicon-plasmonic asymmetric MZI

We demonstrate the first system-level evaluation of an active plasmonic device in 10Gb/s data traffic conditions. Thermo-optic ON/OFF modulation with 3μs response time and 10mW power consumption is presented using an asymmetric MZI silicon-plasmonic gate.

Packet clock recovery using a bismuth oxide fiber-based optical power limiter

We demonstrate an optical clock recovery circuit that extracts the line rate component on a per packet basis from short data packets at 40Gb/s. The circuit comprises a Fabry-Perot filter followed by a novel power limiting configuration, which in turn consists of a 5m highly nonlinear bismuth oxide fiber in cascade with an optical bandpass filter. Both experimental and simulation-based results are in close agreement and reveal that the proposed circuit acquires the timing information within only a small number of bits, yielding a packet clock for every respective data packet. Moreover, we investigate theoretically the scaling laws for the parameters of the circuit for operation beyond 40 Gb/s and present simulation results showing successful packet clock extraction for 160 Gb/s data packets. Finally, the circuits potential for operation at 320 Gb/s is discussed, indicating that ultrafast packet clock recovery should be in principle feasible by exploiting the passive structure of the device and the fsec-scale nonlinear response of the optical fiber.

Design of All-Optical Contention Detection and Resolution for 40-Gb/s Label-Switched Routers

We present a new scheme for all-optical contention detection and time-domain contention resolution of optical packets in label-switched routers that employ all-optical label recognition. The contention detection subsystem provides all the necessary control signals required to drive an optically controlled buffer which employs 1 times 2 optical switching elements and an optical fiber delay line. The state of the buffer is dynamically controlled on a per-packet basis with all the decisions and processing performed in the optical domain. Physical layer simulations show successful buffering and forwarding of 40-Gb/s optical packets with 2-dB power penalty