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Featured researches published by Dominic P. Carrozza.


20th AIAA International Communication Satellite Systems Conference and Exhibit | 2002

Digital Channelizer/Demodulator for Low Cost Broadband Satellite Systems

Dominic P. Carrozza; Eric Homier; Reginald Jue

Future broadband satellite systems will need to be able to serve large numbers of user terminals of varying type, size, and capabilities, as service operators intend to offer multiple terminal configurations depending on the individual subscriber’s data rate needs versus price tolerance. In TRW’s Gen*Star broadband satellite architecture, onboard digital processing provides the capability to service a large number of user terminals with individually configurable data rates, while maximizing overall link performance, network configuration flexibility, and quality of service. In addition, the highly integrated ASIC-based digital implementation is more producible than the traditional analog transponder approach, offering the potential for lower satellite cost. This paper presents an overview of the Gen*Star architecture broadband multibeam, multichannel frequency division multiple access/time division multiple access (FDMA/TDMA) digital demodulator. The scalable architecture processes uplink traffic in a 125 MHz wide sub-band using identical—and independent— demodulation module processors. Each demod module performs the channelization, demodulation, decoding, time synchronization and power control of uplink signals within a 125 MHz sub-band. This paper presents features and benefits of several key components of the demodulator design. The TRWconfigurable digital channelization architecture (patent pending) supports a range of terminal sizes—from inexpensive, fractional-T1 terminals to high bandwidth, 150 Mbps terminals—within the Gen*Star system concept. The approach achieves more efficient use of uplink bandwidth by exploiting an additional benefit of the nature of the digital algorithmguard bands between the frequency channels are eliminated. The onboard demodulator performs carrier phase ambiguity resolution and tracking in the presence of frequency errors and coherently demodulates quadrature phase shift keyed (QPSK) signals in each TDMA burst in each frequency channel. Furthermore, synchronization, power control, demodulation, and decoding algorithms are described. These are critical to minimizing cell loss rate (CLR) in a burst uplink environment. Finally, the paper concludes with a summary of predicted and measured performance data for the engineering model demodulator.


Archive | 2000

Decision directed phase locked loop (DD-PLL) for use with short block codes in digital communication systems

Gregory S. Caso; David A. Wright; Dominic P. Carrozza


Archive | 2000

Method and apparatus for controlling a transmission power threshold of a satellite communication system

David A. Wright; Dennis A. Nivens; Michael S. Munoz; Reginald Jue; Dominic P. Carrozza


Archive | 1999

Uplink demodulator scheme for a processing satellite

Dominic P. Carrozza; Vincent C. Moretti; Stuart T. Linsky; David A. Wright; Gregory S. Caso


Archive | 1999

Synchronization burst processor for a processing satellite

Dominic P. Carrozza; Vincent C. Moretti; David A. Wright; Gregory S. Caso


Archive | 2001

Method of and apparatus for calibrating receive path gain

Gregory S. Caso; Dominic P. Carrozza


Archive | 2000

Buffering and sequencing of soft decisions of multiple channels into a single shared biorthogonal decoder

Dominic P. Carrozza; Vincent C. Moretti; David A. Wright; Gregory S. Caso


Archive | 2001

Doppler learning phase lock loop for burst demodulator

Dominic P. Carrozza; David A. Wright; Reginald Jue


Archive | 2000

Efficient digital channelizer system and method of operation thereof

Vincent C. Moretti; Dominic P. Carrozza; Gregory S. Caso


Archive | 2000

Serial to parallel conversion of data to facilitate sharing a single buffer among multiple channels

Dominic P. Carrozza; Gregory S. Caso

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