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Don A. Van Dyke

Cray

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Publication

Featured researches published by Don A. Van Dyke.

Archive | 1990

System and method for controlling a highly parallel multiprocessor using an anarchy based scheduler for parallel execution thread scheduling

George A. Spix; Diane M. Wengelski; Stuart W. Hawkinson; Mark D. Johnson; Jeremiah D. Burke; Keith J. Thompson; Gregory G. Gaertner; Giacomo G. Brussino; Richard E. Hessel; David M. Barkai; Steve S. Chen; Steven G. Oslon; E. Strout Ii Robert; Jon A. Masamitsu; David M. Cox; Linda J. O'gara; Kelly T. O'hair; David A. Seberger; Timothy J. Cramer; Don A. Van Dyke; Ashok Chandramouli

Archive | 1993

Method and apparatus for user side scheduling in a multiprocessor operating system program that implements distributive scheduling of processes

George A. Spix; Diane M. Wengelski; Stuart W. Hawkinson; Mark D. Johnson; Jeremiah D. Burke; Keith J. Thompson; Gregory G. Gaertner; Giacomo G. Brussino; Richard E. Hessel; David M. Barkai; Steve S. Chen; Steven G. Oslon; E. Strout Ii Robert; Jon A. Masamitsu; David M. Cox; Linda J. O'gara; Kelly T. O'hair; David A. Seberger; Timothy J. Cramer; Don A. Van Dyke; Ashok Chandramouli

Archive | 1990

Computer with integrated hierarchical representation (ihr) of program wherein ihr file is available for debugging and optimizing during target execution

Don A. Van Dyke; Timothy J. Cramer; Kelly T. O'hair; David M. Cox; David A. Seberger; Linda J. O'gara; Jon A. Masamitsu; E. Strout Ii Robert; Ashok Chandramouli

Archive | 2003

Scalar/vector processor

Douglas R. Beard; Andrew E. Phelps; Michael A. Woodmansee; Richard G. Blewett; Jeffrey A. Lohman; Alexander A. Silbey; George A. Spix; Frederick J. Simmons; Don A. Van Dyke

Archive | 1992

Method for optimizing instruction scheduling for a processor having multiple functional resources

Don A. Van Dyke

Archive | 1995

Method and apparatus for chaining vector instructions

Douglas R. Beard; Andrew E. Phelps; Michael A. Woodmansee; Richard G. Blewett; Jeffrey A. Lohman; Alexander A. Silbey; George A. Spix; Frederick J. Simmons; Don A. Van Dyke

Archive | 1995

Partitioned addressing apparatus for vector/scalar registers

Douglas R. Beard; Andrew E. Phelps; Michael A. Woodmansee; Richard G. Blewett; Jeffrey A. Lohman; Alexander A. Silbey; George A. Spix; Frederick J. Simmons; Don A. Van Dyke

Archive | 1995

Vector processor having registers for control by vector resisters

Douglas R. Beard; Andrew E. Phelps; Michael A. Woodmansee; Richard G. Blewett; Jeffrey A. Lohman; Alexander A. Silbey; George A. Spix; Frederick J. Simmons; Don A. Van Dyke

Archive | 1992

Method for inserting a path instruction during compliation of computer programs for processors having multiple functional units

Don A. Van Dyke

Archive | 1995

Vector/scalar processor with simultaneous processing and instruction cache filling

Douglas R. Beard; Andrew E. Phelps; Michael A. Woodmansee; Richard G. Blewett; Jeffrey A. Lohman; Alexander A. Silbey; George A. Spix; Frederick J. Simmons; Don A. Van Dyke

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George A. Spix

Cray

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Alexander A. Silbey

Cray

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Andrew E. Phelps

Cray

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Douglas R. Beard

Cray

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Frederick J. Simmons

Cray

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Jeffrey A. Lohman

Cray

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Michael A. Woodmansee

Cray

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Richard G. Blewett

Cray

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Ashok Chandramouli

Cray

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David A. Seberger

Sun Microsystems

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