Donald R. Machen

A Compact Data Acquisition and Control Terminal for Particle Accelerators

The present trend towards automation of information-processing in particle accelerators dictates the need for a thorough evaluation of the method used in collection and dissemination of this information. A compact, remote terminal for use in automatic data acquisition and control of particle accelerators will be described. The terminal may be controlled by either special-purpose digital logic or by a central control computer. Interfacing to the various accelerator equipment is provided through analog and on-off control and monitoring modules. The detailed design of the logical portion of the remote terminal, in regard to data format, instruction, and command decoding, will be discussed. The method of selection of the appropriate module interface for completion of the desired function will also be treated. In addition, the equipment-interfacing design criteria resulting from actual implementation on accelerator devices will be discussed.

The FMIT Facility Control System

The control system for the Fusion Materials Irradiation Test (FMIT) Facility, under construction at Richland, Washington, uses current techniques in distributed processing to achieve responsiveness, maintainability and reliability. Developmental experience with the system on the FMIT Prototype Accelerator (FPA) being designed at the Los Alamos National Laboratory is described as a function of the systems design goals and details. The functional requirements of the FMIT control system dictated the use of a highly operator-responsive, display-oriented structure, using state-of-the-art console devices for man-machine communications. Further, current technology has allowed the movement of device-dependent tasks into the area traditionally occupied by remote input-output equipment; the systems dual central process computers communicate with remote communications nodes containing microcomputers that are architecturally similar to the top-level machines. The system has been designed to take advantage of commercially available hardware and software. The use of national and international standards in both hardware and software has minimized the design staff and maximized the flexibility and maintainability of the system.

Front-End Data Processing Using the Bit-Sliced Microprocessor

A state-of-the-art computing device, based upon the high-speed bit-sliced microprocessor, has been developed into hardware for front-end data processing in both control and experiment applications at the Los Alamos Scientific Laboratory. The CAMAC Instrunentation Standard provides the framework for the high-speed halrdware, allowing data acquisition and processing to take place at the data source in a CAMAC crate.

A Long Distance CAMAC Branch via Data-Link and Microprogrammed Branch Driver

An unusual solution to the problem of remote operation of CAMAC data systems has been implemented at the Clinton P. Anderson Meson Physics Facility (LAMPF). Data-link communications from a remote CAMAC system, controlled only by a Microprogrammed Branch Driver (MBD), to another CAMAC system coupled to a digital computer, can effectively extend the CAMAC branch highway to several hundred meters.

An Operator's Console for the LAMPF Accelerator

The control system for the Los Alamos Meson Physics Facility (LAMPF) accelerator is organized around an on-line digital computer. The computers versatility in acquiring and arranging data for presentation to the operator made a strong impact on the design of the operators console and the central control room. The racks full of lights, meters, and knobs so typical of a conventional control system were replaced at LAMPF by a compact console in which the prominent device is a graphic display scope with a light pen. This paper traces the evolution of the present LAMPF operators console. The experience gained from a prototype console for a small accelerator is recounted. It was on this console that the concept of graphic control panels was pioneered. The considerations which led to the physical shape of the LAMPF console are explained and a description is given of the various panels. The console was put into operation in December 1970.

The FASTBUS Segment Extension as a Crate Coupling Concept

The Segment Extension is a recent development in FASTBUS hardware that will require changes in the controlling software now being written for physics data acquisition systems. Applications involving the Segment Extension include the logical expansion of the front-end instrumentation crates holding electronics for the hundreds of particle detector channels planned for LEP experiments at CERN, the SLC experiments at SLAC, and CDF experiments at FERMILAB. This paper discusses the characteristics of the Segment Extension and the FASTBUS system-software requirements and hardware requirements imposed by the device.

CAMAC Based Computer-Computer Communications via Microprocessor Data Links

Communications between the central control computer and remote, satellite data acquisition/control stations at The Clinton P. Anderson Meson Physics Facility (LAMPF) is presently accomplished through the use of CAMAC based Data Link modules. With the advent of the microprocessor, a new philosophy for digital data communications has evolved. Data Link modules containing microprocessor controllers provide link management and communication network protocol through algorithms executed in the Data Link microprocessor.

The Satellite Minicomputer -- A Practical Solution to Accelerator Control

Computer control of any large industrial or research facility generally requires the presence of a rather extensive collection of distributed interface devices. These devices serve to couple the control computer to the process, in order that pertinent digital and analog data may be acquired by the computer, and to provide a means for the computer to output set-point information to the process.

CAMAC Systems at LAMPF

The use of CAMAC has been proposed in the experimental area of one of the nations newest particle accelerators. This paper will describe briefly the computer-based data system to be implemented and how CAMAC might solve the interface problem.

The single-chip Fastbus slave interface

A single-chip implementation of the general-purpose Fastbus slave interface (FSI) has been developed in ECL (emitter-coupled logic) gate-array technology. The FSI occupies only 1.6% of the available circuit board space while providing a complete 32-b interface to the Fastbus. For slaves with 15-ns response timing, the maximum data rate expected with the single-chip interface is 25 MHz for all types of data cycles. All mandatory slave-interface requirements of IEEE 960 are supported, in addition to several nonmandatory requirements and the optional, extended MS code features. Geographic, logical, and broadcast addressing are implemented using on-chip registers. An optional multiple-module addressing technique is included that allows participating modules residing on a common crate or cable segment to respond as if individually addressed in sequence. The user interface provided by the FSI allows control of slave status-response and connection timing for both address and data cycles. The BIT1 ECL array technology used for the FSI allows direct connections to the Fastbus, eliminating the need for external driver/receiver buffers. >