Donald William Dahringer

GaAs MQW modulators integrated with silicon CMOS

We demonstrate integration of GaAs-AlGaAs multiple quantum well modulators to silicon CMOS circuitry via flip-chip solder-bonding followed by substrate removal. We obtain 95% device yield for 32/spl times/32 arrays of devices with 15 micron solder pads. We show operation of a simple circuit composed of a modulator and a CMOS transistor.<<ETX>>

1-Gb/s two-beam transimpedance smart-pixel optical receivers made from hybrid GaAs MQW modulators bonded to 0.8 μm silicon CMOS

We have made two-beam smart-pixel optical receivers using a hybrid attachment of GaAs-AlGaAs multiple quantum-well (MQW) pin devices to foundry-fabricated 0.8-/spl mu/m linewidth CMOS circuits. Results from a repeater in which receiver output is coupled to a transmitter circuit driving a differential pair of MQW modulators are reported. When tested with high-contrast, directly-modulated laser diodes, an optical energy of 26 fJ (-21.5 dBm) in each beam is required to obtain a bit error rate of 1/spl times/10/sup -9/ at 622 Mb/s, and operation at this error rate is observed to 1 Gb/s. The described receiver (one of several we have made) has three amplification stages, with the first being of the transimpedance type. The reported receiver fits easily within a 45/spl times/25 /spl mu/m area, and the entire repeater circuit draws about 2 mA from a 5-V power supply, with the transmitter accounting for about 20 percent of the total.

High-speed optoelectronic VLSI switching chip with >4000 optical I/O based on flip-chip bonding of MQW modulators and detectors to silicon CMOS

We present the first high-speed optoelectronic very large scale integrated circuit (VLSI) switching chip using III-V optical modulators and detectors flip-chip bonded to silicon CMOS. The circuit, which consists of an array of 16/spl times/1 switching nodes, has 4096 optical detectors and 256 optical modulators and over 140K transistors. All but two of the 4352 multiple-quantum-well diodes generate photocurrent in response to light. Switching nodes have been tested at data rates above 400 Mb/s per channel, the delay variation across the chip is less than /spl plusmn/400 ps, and crosstalk from neighboring nodes is more than 45 dB below the desired signal. This circuit demonstrates the ability of this hybrid device technology to provide large numbers of high-speed optical I/O with complex electrical circuitry.

Arrays of optoelectronic switching nodes comprised of flip-chip-bonded MQW modulators and detectors on silicon CMOS circuitry

We describe 8/spl times/8 arrays of smart pixels, designed and fabricated using MQW modulators and detectors flip-chip-solder-bonded to silicon CMOS circuits. The individual circuits implement 2 input, 1 output embedded control switching nodes. Four arrays from two different designs were fabricated and tested. For the array with the highest yield, 60 of 64 nodes functioned correctly at low speeds and were tested up to 250 Mb/s without re-adjusting individual bias voltages with the maximum speed of an individual node of 375 Mb/s. For the second-generation array, the center 4/spl times/8 section of the array was tested at data rates beyond 700 Mb/s with individual nodes having short term bit error rates below 10-/sup 11/.

Clocked-sense-amplifier-based smart-pixel optical receivers

We introduce the concept of synchronous smart-pixel optical receivers, and present the first use of a clocked-sense amplifier as a smart-pixel optical receiver. Such a receiver uses the controlled application of positive feedback to obtain low-power compact digital amplification. We describe the design and simulation of two types of optical receivers based on a clamped bit-line sense amplifier (CBLSA), and a conventional sense amplifier (CSA). Both of these circuits have been realized in 0.8 micron-linewidth foundry CMOS with hybrid-bonded GaAs-AlGaAs MQW detectors and modulators attached to the circuit. Operation in excess of 750 Mb/s is demonstrated, within a layout area of 44 /spl mu/m/spl times/22 /spl mu/m, with a bias-dependent estimated power dissipation of 1 to 2 mW. Operation with one or two input beams is possible, with approximate minimum detected photocurrent levels at 320 Mb/s of 8 /spl mu/A (/spl sim/100 fJ) for single-beam operation and 2.5 /spl mu/A/beam (/spl sim/30 fJ/beam) for two-beam operation, all in the CBLSA-based circuit.

Anisotropically conductive polymer films with a uniform dispersion of particles

Anisotropically conductive films consisting of a single layer of magnetically separated conductor spheres in a polymer matrix are described. In a vertical magnetic field, ferromagnetic spheres in a viscous medium become parallel magnetic dipoles and repel one another to produce a uniform, two-dimensional particle distribution. This structure is then frozen in by cooling or curing of the polymer matrix. In order to prevent the formation of undesirable dendritic particle protrusions, the magnetic force on the particles has to be balanced against the surface tension of the polymer and the gravity effect. As an interconnection material placed between circuit devices, the present conductive polymer films with uniformly distributed particles exhibit, as compared to the conventional, random distribution, a reduced tendency for electrical shorts and pad-to-pad variations in contact resistance values especially for fine pitch interconnections. Since the percolation stringers are no longer present in the magnetically distributed structure, it is anticipated that electric-field-induced isolation failures observed in some adhesive films will be substantially diminished. >

3-D integration of MQW SEED detectors and modulators over active sub-micron CMOS circuits: Application to a 2KBit parallel photonic page buffer

The efficacy of many system-designs based on free-space optical interconnects and smart-pixels, depends on the availability of a flexible, high-density, silicon-compatible, optoelectronic technology platform. To this end, we demonstrate the hybrid 3D integration of GaAs-AlGaAs 850nm multiple quantum well (MQW) detectors and modulators directly over active 0.8 /spl mu/m silicon CMOS circuits. To test this technique, a self electro-optic effect device (SEED) input-light detector was flip-chip bonded over a transimpedance receiver circuit, whose output was fed to a simple transmitter circuit and then to another SEED device that served as an output-light modulator.

Optical Test of a Photonic FIFO Page Buffer Memory

We describe the parallel optical test of a photonic first-in-first-out (PFIFO) buffer memory based on flip-chip CMOS/SEED optoelectronic technology. The PFIFO detects pages of 4 by 8 binary bits, stores them in a 32 bit deep buffer memory, and transmits them in a 16 by 2 output modulator array. All 32 I/O and memory channels functioned, with an average input power of 40 microwatts and a minimum output contrast ratio of 2:1.