Douglas Paul

Parallel and Scalable Transient Simulator for Power Grids via Waveform Relaxation (PTS-PWR)

This paper presents a fast algorithm for transient simulation of power grids in very large scale integration systems using waveform relaxation (WR) techniques. Novel partitioning methods and convergence accelerators are developed for fast convergence of WR iterations when applied to power grid networks. Unlike the direct solvers, the new method is highly parallelizable and scales well with the increasing number of CPUs, leading to significant speed-ups. Numerical examples are presented to demonstrate the validity and efficiency of the proposed method.

Parallel Simulation of Massively Coupled Interconnect Networks

In a system containing high-speed interconnects, the presence of a large number of coupled lines seriously limits the ability to perform fast simulations. In this paper, a parallel algorithm is presented that allows for simulations of massively coupled interconnects to be performed efficiently. New methods based on physical and time-domain partitioning are developed to create parallelism during transient simulations of large coupled interconnects. In addition, the proposed method exploits the recently developed waveform relaxation techniques to decouple and parallelize the large coupled simulation problem. In this approach, for a simulation of nL lines run on nP processors, the computational complexity is O(nLnP -1). This provides considerable savings as opposed to O(nL ß ), 3 ¿ ß ¿ 4 for full coupled-line simulations.

Broadband Modeling of High-Frequency Microwave Devices

Circuit modeling of high-frequency devices described by tabulated multiport parameters has generated immense interest during recent years. In most cases, equivalent circuit models (ECMs) are available to the designers, which correlate well with the measured parameters at lower frequencies, however, deviate at higher frequencies. Traditional efforts to improve ECMs are device specific, laborious, and ad-hoc in nature. In order to address these difficulties, this paper presents an efficient and automated algorithm to identify appropriate frequency-dependent elements for adding to the ECM at arbitrary locations so as to correct for high-frequency errors. The new method enables the designers to retain their existing physical models while providing a means to capture the high-frequency effects accurately.

An Automated Algorithm for Broadband Modeling of High-Frequency Microwave Devices

Circuit modeling of high-frequency devices described by tabulated multi-port parameters has generated immense interest during the recent years. In most cases, simple equivalent circuit models (S-ECM) are available to the designers, which correlate well with the measured parameters at lower frequencies, however, deviate at higher frequencies. Traditional efforts to improve equivalent circuit models are device-specific, laborious and ad-hoc in nature. In order to address these difficulties, this paper presents an efficient and automated algorithm to identify appropriate frequency-dependent elements for adding to the S-ECM at arbitrary locations, so as to correct for high frequency errors. The new method enables the designers to retain their existing physical models while providing a means to capture the high-frequency effects accurately

A Passive Algorithm for Modeling Frequency-Dependent Parameters of Coupled Interconnects

The fitting and passivity enforcement of frequency-dependent RLCG parameters becomes a challenging and computationally intensive task in the presence of a large number of coupled lines. In this paper, a new algorithm is introduced that simplifies this multiport problem by reducing it to multiple single-port problems

Transient Analysis of Power Grid Networks via Waveform Relaxation Techniques

This paper presents a fast algorithm for transient simulation of power grids in VLSI systems using waveform relaxation techniques. Novel partitioning methods and convergence accelerators are developed for fast convergence of waveform relaxation iterations when applied to power grid networks. Unlike the direct solvers, the new method is highly parallelizable and yields significant speedups. Numerical examples are presented to demonstrate the validity and efficiency of the proposed method.

A novel passivity verification and enforcement algorithm for macromodels of microwave devices

This paper presents a new algorithm for passivity verification and enforcement on single-port macromodels of microwave devices, characterized by tabulated data. The new approach overcomes the difficulties associated with determining the imaginary eigenvalues of a Hamiltonian matrix, which are traditionally used in validating the passivity of a macromodel. The paper also presents a new method for quantification of passivity violations as well as passivity enforcement.

Fast analysis of power distribution networks using waveform relaxation

This paper presents a fast algorithm for transient simulation of power grids in VLSI systems using waveform relaxation techniques. Novel partitioning methods and convergence accelerators are developed for fast convergence of waveform relaxation iterations when applied to power grid networks. Unlike the direct-solvers, the new method is highly parallelizable and yields significant speed-ups. Numerical examples are presented to demonstrate the validity and efficiency of the proposed method.

Parallel algorithm for analysis of high-speed interconnects

In a system containing high-speed interconnects, the presence of a large number of coupled lines seriously limits the ability to perform fast simulations. In this paper, a parallel algorithm is presented that allows for this class of simulations to be performed efficiently. The proposed method exploits the recently developed algorithm using transverse partitioning and waveform relaxation. A new partitioning algorithm is also proposed to create additional parallelism during transient simulations. In this approach, for a simulation of m lines run on p processors, the computational complexity is O(mp-1). This provides considerable savings as opposed to O(mbeta), 3 les beta les 4 for full coupled-line simulations.

Efficient parallel scheduler for circuit simulation exploiting binary link formulations

As circuit sizes increase, a means to improve the performance of simulations is constantly demanded, without sacrificing the accuracy of the results. To achieve this goal, a new parallel scheduler is presented exploiting binary link formulations that allows modern multi-core processors to achieve superior performance. These improvements are obtained without sacrificing accuracy or resorting to iterative techniques.