E.M.S. Narayanan

Analysis of n-channel MOS-controlled thyristors

The turn-off of the n-channel MOS-controlled thyristor (NMCT) is analyzed using two-dimensional simulation. A lateral NMOS-controlled thyristor structure, LNMCT, suitable for HVIC application is also proposed. It is found that the operation of a parasitic lateral n-p-n transistor in NMCT-type structures degrades the forward voltage drop and the turn-off capability and hence should be suppressed. The maximum controllable current in the NMCT is not only a function of internal parameters, but also depends on external supply voltage. This indicates that snubberless operation of an MCT-type device is not feasible. The advantages and disadvantages of the NMCT are compared with those of conventional MCT structures. The LNMCT turn-off speed is limited by the large amount of holes existing in the substrate, resulting in a turn-off waveform similar to that of an LIGBT. >

Realizing high-voltage junction isolated LDMOS transistors with variation in lateral doping

High-voltage lateral diffused metal-oxide semiconductor (LDMOS) transistors with a variation in the lateral doping (VLD) of drift regions are demonstrated in junction isolation technology using a fully implanted CDMOS process. The VLD profile is realized by using an analytical approach reported previously. The analytical model is verified through simulations and experiment. Results indicate that higher breakdown voltages can be achieved for a given drift length using a VLD profile in comparison to uniform doping while offering a good tradeoff between breakdown voltage and specific on-resistance.

Comparative study of drift region designs in RF LDMOSFETs

Systematic investigation of the drift region design of the RF LDMOSFET in terms of breakdown voltage, on-resistance, transconductance, capacitance and hot-carrier effects is presented. The incorporation of a source field plate allows for an increase of drift dose for a given breakdown voltage, which eases the tradeoff between the breakdown voltage and on-resistance, and the breakdown voltage and transconductance. However, the increased dose can significantly degrade hot-carrier reliability. A step-drift has enhanced hot-carrier immunity and lower capacitance, but, at the cost of increased on-state resistance and lower transconductance. Furthermore, a second origin of hot carriers is reported in the step-drift design, which may cause damage in the drift region. A deeper drift region design, which does not require an additional mask in comparison to the step-drift design, is investigated. The proposed approach shares all the advantages provided by the field plate design. Moreover, the lower concentration in the new drift region design leads to enhanced hot-carrier immunity.

A fast switching segmented anode NPN controlled LIGBT

An ultrafast low energy loss lateral insulated gate bipolar transistor (LIGBT) with a novel segmented anode structure is demonstrated. The anode comprises segments of p/sup +/ and n/sup +//p (n/sup +/ region formed within a p-type region) along the width of the device. By simply varying the ratio of these segments the tradeoff between conduction and switching losses can be varied. Unlike an anode shorted structure this does not exhibit an undesirable snapback in its on-state characteristics. This structure is simple to realize in a CDMOS process without the need for any additional process steps.

MOS control device concepts for AC-AC matrix converter applications: the HCD concept for high-efficiency anode-gated devices

Reverse blocking MOS controlled devices will enable high efficiency ac-ac matrix converter systems to replace dc-linked type circuits. The trend in bidirectional switches is to replace the combination of a unidirectional blocking device and a diode with a monolithic reverse blocking device only. The diode on-state loss is eliminated, part count is reduced, and the system is less bulky. This paper discusses the various reverse blocking concepts suitable for MOS controlled devices for high voltage matrix converter applications. They include the junction isolation, the trench isolation, and the anode-gated (AG) concepts. AG is the only concept not technologically limited beyond 1200 V. However, increasing drift region thickness with voltage rating necessitates innovations to achieve fast switching and low losses without compromising V/sub ce(sat)/. Herein we propose the high channel density concept to further improve the efficiency of AG devices. Simulation results indicate the concept drastically reduces turnoff losses and improve switching speed.

Comparison of Trench Gate IGBT and CIGBT Devices for Increasing the Power Density From High Power Modules

Recently much research has been focused on increasing the functionality and output power density per unit area in power electronic modules without increasing board space. In high power applications, MOS-controlled devices with trench gates are the most desirable as their reduced V ce(sat) enables increased conduction current density. However, with increased drift region thickness, there is significant increase in conduction loss in trench gate-insulated gate bipolar transistor (T-IGBT) due to low plasma density from inherent p-n-p transistor action. In comparison, a well-designed MOS-controlled thyristor structure such as the trench-clustered insulated gate bipolar transistor (T-CIGBT), can provide low on-state conduction loss with gate voltage turn-on and turn-off. The comparison of 3.3 kV/800 A simulation results presented in this paper shows that the T-CIGBT is a superior candidate over TIGBT to increase the power density from existing high-voltage IGBT module footprints.

Experimental Demonstration of 3.3kV Planar CIGBT In NPT Technology

Due to the desirable properties of MOS-gate control, low conduction losses at high voltages, MOS-controiled thyristor structures are preferred for applications at 3.3 kV and beyond. In this paper, we report the results of the first experimental demonstration of the 3.3 kV rated CIGBT (Clustered Insulated Gate Bipolar Transistor) with planar gates in NPT technology. CIGBT is a three terminal MOS- controlled thyristor. Our results show that, with a positive Vce(sat) temperature coefficient and for identical turn-off loss, its Vce(sat) can be more than 0.7 V lower than that of an IGBT. Moreover, for the same gate voltage, it is shown that CIGBT shows lower saturation current density compared to the IGBT. Additionally, due to controlled thyristor mode of operation, a more favourable trade-off performance can be obtained using lower anode implant doses without significantly compromising Vce(sat).

Anode Engineering for the Insulated Gate Bipolar Transistor—A Comparative Review

Significant effort has been placed in anode engineering for the insulated gate bipolar transistor (IGBT) as a method to enhance the on-state/switching loss tradeoff. For the first time, we have taken a comprehensive selection of these designs and individually implemented them all into a 1200 V vertical structure. It is shown that all passive anode engineering structures lie on or above a forward voltage drop/inductive turn-off loss tradeoff curve which can also be generated through changing the emitter (anode) Gummel number of a conventional IGBT. Tradeoff enhancement can be achieved through the use of active anode structures. Such structures incorporate an additional gate at the anode and are considered in the study. The influence of lifetime on the tradeoff is considered and it is shown that optimum device performance can be achieved through both control of the lifetime and the emitter Gummel number/anode engineering. The relative shift in the tradeoff curve is also considered for optimum device design. Furthermore, the effect of the tradeoff curve on the total power loss with varying switching frequency and duty cycle is also discussed. high temperature operation, it is shown that the shift must be carefully considered for optimum device design. Furthermore, the effect of the tradeoff curve on the total power loss with varying switching frequency and duty cycle is also discussed.

Analysis of CMOS-compatible lateral insulated base transistors

The authors describe the performance of various lateral insulated base transistors (LIBTs) fabricated with a 2.5- mu m digital CMOS-compatible high-voltage integrated circuit (HVIC) process. Structural modifications have been proposed to the LIBTs reported to date, in order to improve their on-stage performance. The modifications have been achieved with the use of charge-controlled n/sup +/ buried layers incorporated within the device structures. These LIBTs are implemented with a novel HVIC process which is based on a 2.5- mu m digital CMOS fabrication sequence. This process utilizes three additional steps carried out prior to the CMOS fabrication sequence. An important feature of this HVIC process is the use of a 400-AA gate oxide, which makes the power devices, fully compatible with the low-voltage digital circuits. During this work, a specific on-resistance of 0.016 Omega -cm/sup 2/ and a turn-off delay of 90 ns have been obtained in an improved LIBT structure which is capable of withstanding up to 250 V. >

Performance analysis of the segment npn anode LIGBT

The performance of a high-voltage lateral insulated gate bipolar transistor (LIGBTs) with segmented n+p/n anode fabricated in junction isolation technology is experimentally investigated at both room and elevated temperatures. Detailed two dimensional numerical modeling of a vertical representation of the structure shows that significant electron current passes through the n/sup +/p/n segment of the anode region during the on-state and when devices are subjected to clamped inductive switching. It is shown that the magnitude of electron current can be controlled by modifying the p-base charge which enables enhancement of the turn-off loss/forward voltage drop tradeoff in comparison to conventional LIGBTs.