Eddie Batista de Lima Filho

ECG Signal Compression Based on Dc Equalization and Complexity Sorting

In this brief, we present new preprocessing techniques for electrocardiogram signals, namely, DC equalization and complexity sorting, which when applied can improve current 2-D compression algorithms. The experimental results with signals from the Massachusetts Institute of Technology - Beth Israel Hospital (MIT-BIH) database outperform the ones from many state-of-the-art schemes described in the literature.

On EMG Signal Compression With Recurrent Patterns

In this paper, the multidimensional multiscale parser (MMP) is employed for encoding electromyographic signals. The experiments were carried out with real signals acquired in laboratory and show that the proposed scheme is effective, outperforming even wavelet-based state-of- the-art schemes present in the literature in terms of percent root mean square difference times compression ratio.

DSVerifier: A Bounded Model Checking Tool for Digital Systems

This work presents the Digital-Systems Verifier DSVerifier, which is a verification tool developed for digital systems. In particular, DSVerifier employs the bounded model checking technique based on satisfiability modulo theories SMT solvers, which allows engineers to verify the occurrence of design errors, due to the finite word-length approach employed in fixed-point digital filters and controllers. This tool consists in an additional module for the efficient SMT-based context-bounded model checker and presents command-line and graphical user interface GUI versions. Indeed, the GUI version is essential for reporting property violations, together with associated counterexamples. DSVerifier is implemented in C/C

Bounded model checking for fixed-point digital filters

++

Bounded model checking of C++ programs based on the Qt framework

and uses JavaFX for providing GUI support.

Multidimensional signal compression using multi-scale recurrent patterns with smooth side-match criterion

This paper presents the results of a multiscale pattern-matching-based ECG encoder, which employs simple preprocessing techniques for adapting the input signal. Experiments carried out with records from the Massachusetts Institute of Technology-Beth Israel Hospital database show that the proposed scheme is effective, outperforming some state-of-the-art schemes described in the literature.

ESBMC^{QtOM}: A Bounded Model Checking Tool to Verify Qt Applications

BackgroundCurrently, digital filters are employed in a wide range of signal processing applications, using fixed- and floating-point processors. Regarding the former, some filter implementations may be highly prone to errors, due to problems related to finite word-length. In particular, signal processing modules may produce overflows and unwanted noise, which are caused by quantization and round-off effects, during accumulative-addition and multiplication operations. As a consequence, the system output may overflow or even keep oscillating, which compromises the expected system performance.MethodsThe present paper addresses this problem and proposes a new methodology for verifying digital filters, called digital systems verifier, which is based on state-of-the-art bounded model checkers that support full C and employ solvers for boolean satisfiability and satisfiability modulo theories. In addition to verifying overflow and limit-cycle occurrences, the present approach can also check output errors and time constraints, based on discrete-time models implemented in C.ResultsExperiments conducted during this work show that the proposed methodology is effective, when finding realistic design errors with respect to fixed-point implementations of digital filters.ConclusionsGoing further than previous attempts, the present results suggest that the proposed method, in addition to helping designers in determining the number of bits for fixed-point representations, can also aid in defining details about filter realization and structure.

Electromyographic signal compression based on preprocessing techniques

The software development process for embedded systems is getting faster and faster, which generally incurs an increase in the associated complexity. As a consequence, technology companies tend to invest in fast and automatic verification mechanisms, to create robust systems and reduce product recall rates. In addition, further development‐time reduction and system robustness can be achieved through cross‐platform frameworks, such as Qt, which favor the reliable port of software stacks to different devices. Based on that, the present paper proposes a simplified version of the Qt framework, which is integrated into a checker based on satisfiability modulo theories (SMT), known as the Efficient SMT‐based Context‐Bounded Model Checker, for verifying actual Qt‐based applications, with a success rate of 89%, for the developed benchmark suite. Furthermore, the simplified version of the Qt framework, named as Qt Operational Model, was also evaluated using other state‐of‐the‐art verifiers for C++ programs. In fact, Qt Operational Model was combined with 2 different verification approaches: explicit‐state model checking and also symbolic (bounded) model checking, during the experimental evaluation, which highlights its flexibility. The proposed methodology is the first one to formally verify Qt‐based applications, which has the potential to devise new directions for software verification of portable code.