Eduardo Valentin

An agile development methodology applied to embedded control software under stringent hardware constraints

In recent years, discrete control systems play an important role in the development and advancement of modern civilization and technology. Practically every aspect of our life is affected by some type of control systems. This kind of system maybe classified as an embedded real-time system and requires rigorous methodologies to develop the software that is under stringent hardware constraints. Therefore, the proposed development methodology adapts agile principles and patterns in order to build embedded control systems focusing on the issues related to the systems constraints and safety. Strong unit testing is the foundation of the proposed methodology for ensuring timeliness and correctness. Moreover, platform-based design approach is used to balance costs and time-to-market in view of performance and functionality constraints. We conclude that the proposed methodology reduces significantly the design time and cost as well as leads to better software modularity and reliability.

A Platform-Based Software Design Methodology for Embedded Control Systems: An Agile Toolkit

A discrete control system, with stringent hardware constraints, is effectively an embedded real-time system and hence requires a rigorous methodology to develop the software involved. The development methodology proposed in this paper adapts agile principles and patterns to support the building of embedded control systems, focusing on the issues relating to a systems constraints and safety. Strong unit testing, to ensure correctness, including the satisfaction of timing constraints, is the foundation of the proposed methodology. A platform-based design approach is used to balance costs and time-to-market in relation to performance and functionality constraints. It is concluded that the proposed methodology significantly reduces design time and costs, as well as leading to better software modularity and reliability.

Applying MGAP Modeling to the Hard Real-time Task Allocation on Multiple Heterogeneous Processors Problem

The usage of heterogeneous multicore platforms is appealing for applications, e.g. hard real-time systems, due to the potential reduced energy consumption offered by such platforms. However, the power wall is still a barrier to improving the processor design process due to the power consumption of components. Hard real-time systems are part of life critical environments and reducing the energy consumption on such systems is an onerous and complex process. This paper reassesses the problem of finding assignments of hard real-time tasks among heterogeneous processors taking into account timing constraints and targeting low power consumption. We also propose models based on a well-established literature formulation of the Multilevel Generalized Assignment Problem (MGAP). We tackle the problem from the perspective of different integer programming mathematical formulations and their interplay on the search for optimal solutions. Experimentation shows that using strict schedulability tests as constraints of 0/1 integer linear programming results in faster solvers capable of finding optimum solutions with lower power consumption.

Towards optimal solutions for the low power hard real-time task allocation on multiple heterogeneous processors

Abstract The usage of heterogeneous multicore platforms is appealing for applications, e.g. hard real-time systems, due to the potential reduced energy consumption offered by such platforms. However, even in such platforms the power wall phenomena still imposes limits to performance. Hard real-time systems are part of life critical environments and reducing the energy consumption on such systems is an onerous and complex process. We tackle the problem from the perspective of different representative integer programming mathematical formulations and their interplay on the search for optimal solutions for Rate Monotonic (RM) and Earliest Deadline First (EDF) scheduling algorithms. The proposed models are based on a well-established formulation in the operational research literature, namely, the Multilevel Generalized Assignment Problem (MGAP). This paper, therefore, assesses the problem of finding optimal allocations and frequency assignments of hard real-time tasks among heterogeneous processors targeting low power consumption, but taking into account timing constraints. Computational experiments show that finding optimal solutions reduces the estimated energy consumption of the evaluated cases when compared to state-of-the-art algorithms.

Reaching Optimum Solutions for the Low Power Hard Real-Time Task Allocation on Multiple Heterogeneous Processors Problem

The usage of heterogeneous multicore platforms is appealing for applications, e.g. hard real-time systems, due to the potential reduced energy consumption offered by such platforms. However, the power wall is still a barrier to improving the processor design process due to the power consumption of components. Hard real-time systems are part of life critical environments and reducing the energy consumption on such systems is an onerous and complex process. This paper assesses the problem of finding optimum allocations and frequency assignments of hard real-time tasks among heterogeneous processors targeting low power consumption but taking into account timing constraints. We also propose models based on a well-established formulation in the operational research literature of the Multilevel Generalized Assignment Problem (MGAP). We tackle the problem from the perspective of different integer programming mathematical formulations and their interplay on the search for optimal solutions for RM and EDF. Computational experiments show that providing upper bounds determined by a meta-heuristic based on genetic algorithm reduces the time to finding optimal solution from hours to milliseconds, enabling us to still pursue optimum in larger instances.

A car racing based strategy for the Dynamic Voltage and Frequency Scaling technique

This work proposes the application of a car racing analogy to develop real-time applications with low energy consumption using the Dynamic Voltage and Frequency Scaling technique. Although several previous works had dealt with the DVFS technique, our proposed method offers two main improvements. First, it can be applied to multiple preemptable real-time tasks. Second, in our method, energy consumption optimization may be carried out even when the worst case execution path is followed. The proposed method takes into account the limited set of available frequencies, and consider both the timing and energy overheads for changing the frequency/voltage. Our simulation results indicate clearly the practical usability, efficiency, and the advantages of the proposed method.

Designing Distributed Real-Time Systems to Process Complex Control Workload in the Energy Industry

The energy industry demands computing system technologies with advanced state-of-the-art techniques to achieve reliability and safety for monitoring and properly dealing with several complex constraints. These computing systems also require delivering correct data at the right time imposing hard real-time constraints, because there are lots of situations where missing critical data may be catastrophic. The challenges faced by computer engineers in the energy industry also include designing distributed real-time systems to process such complex control workload. Besides, the computing system may also demand high energy consumption on its own. In this chapter, we demonstrate how to construct a mathematical formulation applicable for these computing systems and how to solve it to distribute the hard real-time workload of the process control systems considering technological constraints and optimizing for low power consumption of such computing systems. We present two computational techniques of resolution: an exact algorithm based on Branch-and-Cut and a meta-heuristic based on Genetic Algorithm. While the exact algorithm combines a branch-and-cut strategy with response time based schedulability analysis, the genetic algorithm still considers the response time schedulability analysis but follows an evolutionary solving strategy. Both computational techniques deliver solutions for heterogeneous computing systems with a control application, considering precedence, preemption, mutual exclusion, timing, temperature, and capacity constraints. In computational experiments, we present the usage of such techniques in a case study based on a control system for a power plant monitoring application.

Inserting DVFS Code in Hard Real-Time System Tasks

Applying Dynamic Voltage and Frequency Scaling (DVFS) in real-time systems is not a trivial task. Real-Time tasks are bounded to timing constraints in such a way that a simple performance degradation may cause the system to totally fail. Thus, this work aims at gathering two DVFS approaches (intra and inter-tasks) to define a methodology for optimizing energy consumption in hard real-time systems. The intra-task approach analyzes execution flow of a task and identifies where new instructions can be inserted in order to change supply voltage and frequency when the worst-case path is not followed. On the other hand, the inter-task analyzes how long a task waits due to interferences (e.g. preemption, shared resources), verifies system schedulability, and defines a set of initial optimal frequencies in multi-task environment. The proposed method generates a new code with the same functionality as the original one, but with the advantage of having instructions to change voltage and frequency while taking into account the task interferences, and the new added overheads. Moreover, the experimental results show not only timing constraints were satisfied, but also the energy consumption was reduced around 16% and 18% compared to the total consumption of the highest available frequency in two evaluated paths.

Real-time tasks and voltage/frequency controller collaboration on low power energy operational systems

Embedded systems have evolved significantly in recent years, mainly due to advances in technology, cost reduction of electronic equipment, and the popularization of mobile devices. Many of these systems require energy resources from battery to maintain the operation of their various components. However, to increase the autonomy of these devices, several techniques and methodologies have been implemented to better manage energy consumption of the system as a whole. This requirement has contributed to the rise of various lines of research, including the area of real-time systems, in which the complicating factor is not only reducing energy consumption but also respecting the time constraints of all tasks running on the system. Thus, this work aims to minimize energy consumption by using intra-task dynamic voltage and frequency scaling (DVFS) technique, through a collaborative approach between real-time applications and the operating system. Therefore, both can work together, within the kernel of the system, to reduce the overhead of the processor context switches, mainly after preemptions. The experimental results, using C-Benchmarks, showed that it is possible to decrease about 6% of processor power consumption even performing all tasks in the worst case.

JFORTES: Java Formal Unit TESt Generation

The use of computer-based systems has increased significantly over the last years in several domains, mainly when we take into account the applications running on mobile platforms that have exploded in just a few short years, so that software verification and testing now play an important role in ensuring the overall product quality. In this paper, we describe the preliminary results of a work that presents a method to integrate formal verification techniques adopting ESC/Java2 and JCute tools with unit testing by TestNG framework to verify Java programs. This method aims to extract the safety properties generated by ESC/Java2 to automatically generate test cases using the rich set of assertions provided by the TestNG framework and JCute to validate those test cases. It is worth noting that is widely recognized that there is a growing need for automated testing techniques aimed at mobile applications, in platforms, such as: Android or Java Platform, Micro Edition (Java ME). Additionally, a critical challenge is the systematic generation of test cases. We show preliminary results of our proposed method over publicly available benchmarks, and compare the results to recognized tools, e.g., CBMC and JavaPathFinder. Experimental results show that our proposed method detects 86.04% of correct results (i.e., if a property satisfy its specification or is violated), while CBMC has found 79.06%, and JPF has found 93,02%.