Eiji Saito

Epitaxial Growth Processes of Graphene on Silicon Substrates

Few-layers graphene is epitaxially grown on silicon substrates via SiC thin films inserted in between. We have conducted a detailed structural characterization of this graphene-on-silicon (GOS) material by Raman spectroscopy and transmission-electron microscopy, to obtain insights into the impacts of process parameters on defect formation. Results suggest that defects in graphene preferentially dwell at steps. Future flattening of the SiC surface, prior to graphene growth, is thus expected to contribute to the improvement of GOS quality.

Controls over Structural and Electronic Properties of Epitaxial Graphene on Silicon Using Surface Termination of 3C-SiC(111)/Si

Epitaxial graphene on Si (GOS) using a heteroepitaxy of 3C-SiC/Si has attracted recent attention owing to its capability to fuse graphene with Si-based electronics. We demonstrate that the stacking, interface structure, and hence, electronic properties of GOS can be controlled by tuning the surface termination of 3C-SiC(111)/Si, with a proper choice of Si substrate and SiC growth conditions. On the Si-terminated 3C-SiC(111)/Si(111) surface, GOS is Bernal-stacked with a band splitting, while on the C-terminated 3C-SiC(111)/Si(110) surface, GOS is turbostratically stacked without a band splitting. This work enables us to precisely control the electronic properties of GOS for forthcoming devices.

Transmission Electron Microscopy and Raman-Scattering Spectroscopy Observation on the Interface Structure of Graphene Formed on Si Substrates with Various Orientations

Graphene can be grown on three major low-index substrates of Si(111), (110), and (001) by forming a 3C-SiC thin film and by subliming Si atoms from the top few layers of the SiC film. We have investigated the structure of graphene/3C-SiC interface by cross-sectional transmission electron microscopy (XTEM) and Raman-scattering spectroscopy. While the interface layer quite similar to that on the graphene/6H-SiC(0001) face is found to exist on the 3C-SiC(111)/Si(111) substrate, no such interface structure exists on the (110)- and (001)-oriented faces.

Control of carrier lifetime of thick n-type 4H-SiC epilayers by high-temperature Ar annealing

We investigated the carrier lifetime and Z1/2 center density of thick n-type 4H-SiC epilayers, which were oxidized and subsequently annealed in Ar at high temperatures. The Z1/2 center density decreased below the detection limit in the region to, at least, a 130 µm depth by thermal oxidation. After subsequent high-temperature annealing, the Z1/2 center density increased with increasing annealing temperature, while the distribution of the Z1/2 center density was nearly uniform to a 130 µm depth. The carrier lifetime could be controlled from 26 to 2.4 µs by changing the annealing temperature from 1600 to 1800 °C.

Growth Rate Anomaly in Ultralow-Pressure Chemical Vapor Deposition of 3C-SiC on Si(001) Using Monomethylsilane

Temperature dependence of the growth rate of 3C-SiC films on Si(001) during ultralow-pressure chemical vapor deposition (ULP-CVD) using monomethylsilane is reported. At low temperatures the growth rate is high and thermally activated, but a drastic drop of the growth rate occurs at a critical temperature Tc. Another characteristic temperature T* (≤Tc) separates single-crystalline and polycrystalline SiC(001)/Si growth. With a two-step growth procedure, consisting of a high temperature nucleation of a seeding 3C-SiC(001) layer followed by a low-temperature deposition, we have realized a high-rate (~3 µm/h) growth of a single-crystalline 3C-SiC(001) film.

Rotated Epitaxy of 3C-SiC(111) on Si(110) Substrate Using Monomethylsilane-Based Gas-Source Molecular-Beam Epitaxy

3C-SiC is the only polytype that grows heteroepitaxially on Si substrates and, therefore, it is of high interest for various potentail applications. However, the large (~20 %) lattice mismatch of SiC with the Si substrate causes a serious problem. In this respect, rotated epitaxy of 3C-SiC(111) on the Si(110) substrate is highly promising because it allows reduction of the lattice mismatch down to a few percent. We have systematically searched the growth conditions for the onset of this rotated epitaxy, and have found that the rotaed epitaxy occurrs at higher growth temperatures and at lower source-gas pressures. This result indicates that the rotated epitaxy occurs under growth conditions that are close to the equilibrium and is thefore thermodynamically, rather than kinetically, driven.

Oxygen-Induced Reduction of the Graphitization Temperature of SiC Surface

In the solid–vapor phase equilibria between SiC and O2 system, there exists a region where the reaction (2+x)SiC+O2→(2+x)Si↑+ 2CO↑+ xC↓ takes place [Y. W. Song and F. W. Smith: J. Am. Ceram. Soc. 88 (2005) 1864]. By tuning the temperature and the oxygen pressure used in the graphitization annealing into this region, we have succeeded in the growth of epitaxial graphene on SiC crystals at 1000 °C, which is lower, by 250 °C or more, than the conventional epitaxial graphene method. The method is especially useful to formation of epitaxial graphene on silicon (GOS), which requires a lower graphitization temperature because of the Si substrate as well as of its mission to attain compatibility with Si technology.

Low-Temperature, Low-Pressure and Ultrahigh-Rate Growth of Single-Crystalline 3C-SiC on Si Substrate by ULP-CVD Using Organosilane

Temperature dependence of the growth rate of 3C-SiC(001) films on Si(001) substrates during ultralow-pressure (ULP: ~10-1 Pa) CVD using monomethylsilane has been investigated in detail by using pyrometric interferometry. A novel behavior, i.e. a sharp division of the growth mode into two regimes depending on the growth temperature, has been found to exist. Based on this finding, we have developed a two-step process, which realizes a low-temperature (900 °C), high-rate growth of single-crystalline 3C-SiC film on Si substrates, whose rate of 3 m/h is extremely high for this ULP process.

High-Rate Rotated Epitaxy of 3C-SiC(111) on Si(110) Substrate for Qualified Epitaxial Graphene on Silicon

In the formation of epitaxial graphene on Si substrates, the growth of high-quality 3C-SiC thin films on Si substrates is a key to success. As a solution to the large mismatch between the Si substrate and the 3C-SiC film, rotated epitaxy in which 3C-SiC(111) films are grown on Si(110) substrates is quite attractive. In some applications, on the other hand, a certatin thickness (~100 nm or more) is required for this 3C-SiC films as well. A two-step growth method has been thus developed to realize a high-rate, qualified rotated epitaxy. A qualified graphene is found to be formed on this rotated epi-film, as typified by the increase of the grain size by a factor of 1.6 from the non-rotated epitaxy.

(Invited) Epitaxial Formation of Graphene on Si Substrates: From Heteroepitaxy of 3C-SiC to Si Sublimation

Since the pioneering work by Novoselov and Geim in 2004 [1], graphene has attracted skyrocketing attention as a new electronic material. Behind this enthusiasm are the fundamental limitations that silicon is facing, which impede further scaling of Si devices down into sub-10 nm regions. In this respect, the expectation for graphene is two-fold: medium term and long term. As for the former, the expectation as a new channel material in field-effect transistors (FET) is at its center (More Moore strategy). As for the latter, graphene’s novel quantum properties are expected to bring about new paradigm of information processing (Beyond CMOS strategy). The fact that many quantum phenomena, such as quantized Hall effect [2] and spin-polization of the current [3], can be observed at room temperatures in graphene, which is not usual in other materials, fuels the trend.