Ekachai Leelarasmee

Low power CMOS dynamic latch comparators

The paper proposes three new low power CMOS dynamic latch comparators suitable for pipeline analog-to-digital converters. All three use the same differential comparing circuit that can be modeled as variable resistors to trigger the switching behavior of a cross coupled latch. However, their dynamic behaviors during the reset phase are different. The first one precharges the two outputs at HIGH state. The second one discharges the outputs at slightly above the threshold voltage. The third one uses charge sharing to attain approximately half the supply voltage at both outputs. Preliminary simulation shows that the charge sharing technique yields lowest power consumption of 90 /spl mu/W at 100 MHz. All three comparators have an offset voltage in the range of 30-150 mV.

Adaptive electromagnetic energy harvesting circuit for wireless sensor application

This paper presents a microcontroller controlled electromagnetic energy harvesting system suitable for harvesting energy from a single HV transmission line with current between 65A and 130A.The system comprises of magnetic power generator, standard voltage multiplier circuit, DC-DC boost converter and microcontroller. An adaptive algorithm has been applied to the microcontroller to adjust the duty cycle of the converter to achieve maximum output power. This enables the harvesting system to convert and store low voltage sinusoidal power induce from magnetic power generator into the battery for energizing various low power applications. The implemented system is able to operate with minimum sinusoidal induced voltage as low as 1V and can generate 58mW at 65 mA line current. Furthermore, simulation and experimental result as well as mathematical analysis are also included in this paper.

A distributed state variables approach to the transmission lines transient simulation

A distributed state variables approach for the transient simulation of transmission lines is presented. This approach treats voltage and current distributions as state variables in the Telegraphers equation. Therefore the equation can be viewed as a state equation which uses previous distributions and boundary conditions to solve for distributions at any t > 0. With this approach, the companion model of the transmission lines can be obtained without resorting to spatial segmentation. Local truncation error can also be calculated. Numerical examples are given to demonstrate the validity and efficiency of the method.

A TV sign image expander with built-in closed caption decoder

A low cost TV set top box capable of expanding sign images and decoding closed caption data is described. Its internal architecture mainly consists of video decoder/encoder, 256 Kbytes of video memories, an infrared receiver and an FPGA based video processing unit. The FPGA implements a 27 MHz 8 bits microcontroller, an image expander, an on screen display unit, a 12C interface plus other control logic. The image expander uses a fixed 2/spl times/2 bilinear interpolation coupled with a nearest neighborhood input selection to simplify the hardware that allows 9 image scaling factors ranging from 1/spl times/1 to 2/spl times/2. The sign image that can be expanded is of the maximum size of 128/spl times/128 pixels or approximately 1/25 of the entire TV screen. This video processing unit can also decode both Thai and English caption codes inserted in the vertical blanking interval of the incoming composite video signal and display their Thai-English colored fonts in 32/spl times/16 dot matrix forms.

A Quadrature Generator Based on CMOS Triangular-to-Sine/Cosine Converter with 1/4 Frequency Output

A major challenge in IC design applications is simplifying structure of a sinusoidal generator without serious performance degradation. This paper presents a triangular-to- sine/cosine converter (TSCC) implemented from simple CMOS circuits that can generate sine/cosine waveforms simultaneously from a triangular input. Its principle of operation is based on generating two functions that approximate sine/cosine in a 45 degree span and sequentially combining them to form a full wave with one-fourth the frequency of the triangular input. The circuits of TSCC are modeled using 0.18 micron CMOS technology for HSPICE simulation. As a result, the output signals with a total harmonic content of 0.220 percent at 1 kHz are achieved.

A SERIES DC POWER LINE COMMUNICATION AND ITS APPLICATION TO MONITORING PHOTO-VOLTAIC STRINGS

A communication circuit for transmitting and receiving signal through a series connection of photo-voltaic (PV) panels is proposed. It consists of a transformer connected in series with each panel to couple current signal in and out of the DC power line. This allows data transmission through the panels without using any additional wires or radio frequency link. A practical case of eight 40 W amorphous PV panels is used to demonstrate the design process. It is found that the optimum carrier frequency is 250 kHz at which the panel output impedance is around 5 Ohms, allowing the current signal to pass through with low energy lost. Coupling circuit consists of inductors and capacitors designed to give highest transmission at the carrier frequency. Simulation to verify the circuit performance using a non-ideal model of a toroidal transformer is carried out to prove the feasibility of the concept.

A pipelined bilinear interpolation for real time video image expansion

A hardware for expanding an image window of a TV screen in real time is proposed. It uses bilinear interpolation to enlarge a window of size at least 128/spl times/128 pixels by 4 times. It consists of a video decoder/encoder for converting a composite video signal into a 27 MByte/sec ITU-R BT.656 standard digital format and vice versa, three memory chips for storing partially or fully expanded images and an FPGA programmed as an expansion controller. The FPGA implements the bilinear interpolation of the digitized image by splitting into horizontal and vertical expansions that can be pipelinely executed within a delay of two video frame or 80 msec. Using an infrared remote controller, a deaf person can locate the sign language window and turn on its expansion to suit his viewing need.

Error analyses of a 3-phase electricity meter with class-0.5 accuracy

A design of a 3-phase TOU electricity meter with IEC687 class 0.5 accuracy is proposed. The emphasis is upon its error analyses. Current transformers and voltage dividers are chosen to be the current and voltage transducers respectively. Two T1 ADS8345 16-bit A/D converters are used to digitize 3-phase current and 3-phase voltage signals independently. The Dallas DS89C450 microcontroller processes data with 16-bit fix-pointed calculation. Experiment results show that the accuracy of the meter lies within ranges specified in the IEC687 standard. Error Analyses are compared with the measured results, and show that the main cause of error is variation of the phase shift of the CT.

An FPGA based teletext inserter chip

A teletext inserter chip developed on an FPGA is presented. Together with a few number of analog IC components, the chip can be used in conjunction with a PC to forms a versatile teletext inserter. The PC is used to edit the teletext information and send the teletext data through its parallel port to the chip. The data are stored in the chip until the designated TV scan lines are reached and then shifted out serially to be inserted in the composite video signal by another analog circuit. The chip is designed by using VHDL models and synthesized on an FPGA chip with 5,000 gates equivalent complexity. It can insert up to 8 teletext data lines per TV signal field.

Circuits for data communication through DC power line in solar farm

A DC series connection of photo-voltaic panels in Solar with the converter can b e treated as forming a DC loop. This allows AC current signal to flow and become carrier for data transmission. Circuits that implement this approach are presented. This technique does not require additional wires or radio frequency link.