Elad Mentovich

A 64 Gb/s PAM-4 linear optical receiver

We present a linear optical receiver realized on 130 nm SiGe BiCMOS. Error-free operation assuming FEC is shown at bitrates up to 64 Gb/s (32 Gbaud) with 165mW power consumption, corresponding to 2.578 pJ/bit.

Hybrid silicon photonics flip-chip laser integration with vertical self-alignment

We present a flip-chip integration process in which the vertical alignment is guaranteed by a mechanical contact between pedestals defined in a recess etched into a silicon photonics chip and a laser or semiconductor optical amplifier. By selectively etching up to the active region of the III-V materials, we can make the accuracy of vertical alignment independent on the process control applied to layer thicknesses during silicon photonics or III-V chip fabrication, enabling alignment tolerances below ±10 nm in the vertical (Z-)direction.

100 Gbit/s serial transmission using a silicon-organic hybrid (SOH) modulator and a duobinary driver IC

100 Gbit/s three-level (50 Gbit/s OOK) signals are generated using a silicon-organic hybrid modulator and a BiCMOS duobinary driver IC at a BER of 8.5×10⁻⁵(<10⁻²). We demonstrate dispersion-compensated transmission over 5 km.

Co-integration of a temperature tolerant low impedance resonantly enhanced silicon photonics modulator

We report on an optically wideband, resonantly enhanced Mach-Zehnder modulator co-integrated with a 4Ω output impedance, 28Gbd driver from Mellanox Technologies. Error free transmission is demonstrated, at 14Gbps (25Gbps), in 4nm (3nm) wide optical wavelength range at a 10mW (20mW) laser output power level.

An 800 Mhz mixed-V T 4T gain-cell embedded DRAM in 28 nm CMOS bulk process for approximate computing applications

Gain-cell embedded DRAM (GC-eDRAM) is an attractive alternative to traditional SRAM, due to its high-density, low-leakage, and inherent 2-ported operation, yet, its dynamic nature leads to limited retention time that requires periodic, power-hungry refresh cycles. This drawback is further aggravated in scaled technologies, where increased leakage currents and decreased in-cell storage capacitances lead to accelerated data integrity deterioration. However, the emerging approximate computing paradigm utilizes the inherent error resilience of some applications to tolerate data errors. Such error tolerance can be exploited by reducing the refresh rate in GC-eDRAM to achieve a substantial decrease in power consumption, at the cost of an increase in cell failure probability. In this paper, we present the first fabricated and fully functional GC-eDRAM in a 28 nm bulk CMOS technology. The array, which is based on a novel mixed-Vt 4T bitcell, can be used in both traditional and for approximate computing applications, featuring a small silicon footprint and supporting high-performance operation. Silicon measurements demonstrate successful operation at 800 Mhz under a 900 mV supply, while retaining almost 30% lower area than a single-ported 6T SRAM in the same technology.

Silicon Photonics Transmitter with SOA and Semiconductor Mode-Locked Laser

We experimentally investigate an optical link relying on silicon photonics transmitter and receiver components as well as a single section semiconductor mode-locked laser as a light source and a semiconductor optical amplifier for signal amplification. A transmitter based on a silicon photonics resonant ring modulator, an external single section mode-locked laser and an external semiconductor optical amplifier operated together with a standard receiver reliably supports 14 Gbps on-off keying signaling with a signal quality factor better than 7 for 8 consecutive comb lines, as well as 25 Gbps signaling with a signal quality factor better than 7 for one isolated comb line, both without forward error correction. Resonant ring modulators and Germanium waveguide photodetectors are further hybridly integrated with chip scale driver and receiver electronics, and their co-operability tested. These experiments will serve as the basis for assessing the feasibility of a silicon photonics wavelength division multiplexed link relying on a single section mode-locked laser as a multi-carrier light source.

WDM transceiver with semiconductor mode locked laser

We demonstrate a Silicon Photonics transmitter/receiver pair wire bonded to chip-scale electronics and operated with a single section semiconductor mode locked laser. The compact WDM system supports twelve independent error free (BER<;1e-12) 14 Gbps channels without error correction, preemphasis or equalization.