Elve Desiderius Jozef Moons

Looking to/for Low Power ADSL Drivers in the DSLAM.

An overview is given about the central office (CO) ADSL line driver. In the introduction it is explained there is still a high volume of components to be expected in the next years. Further on, some ADSL signal characteristics are highlighted in order to understand the power efficiency problem of the line driver, requirements are explained and critical performance issues considered. Topologies of existing drivers are described and include the class AB, G and H. Attention is give to switching line drivers like the class D, K and SOPA. Finally a combined architecture is described taking the benefit of high efficient switching together with high linear class AB operation.

An analog telephone subscriber chipset integrating 16 lines with fully programmable central office impedance

This paper describes the chipset (3 ASICs) for an analog telephone subscriber line circuit: a 16 channel digital circuit performing speech band filtering, echo cancellation, A-law//spl mu/-law coding and controlling interface, an 8 channel analog/digital circuit performing the A/D and D/A conversion with analog filtering, and an analog high voltage BICMOS circuit covering the SLIC (Subscriber Line Interface Circuit) function with special attention for the integration of software programmable synthesized AC and DC impedances.