Eric Bernard Schorn

Personal computer system with bus noise rejection

High performance dynamic multiplexers without clocked NFET

NMOS charge-sharing prevention device for dynamic logic circuits

Data processing system and method for improving performance of domino-type logic using multiphase clocks

Personal computer system with input/output controller having serial/parallel ports and a feedback line indicating readiness of the ports

Fast, low power exclusive or circuit

Automated method for optimizing characteristics of electronic circuits

Edge triggered latch

Dynamic to static logic translator or pulse catcher

High performance dynamic logic compatible and scannable transparent latch