Eric J. Schwabe

Improved algorithms and data structures for solving graph problems in external memory

Recently, the study of I/O-efficient algorithms has moved beyond fundamental problems of sorting and permuting and into wider areas such as computational geometry and graph algorithms. With this expansion has come a need for new algorithmic techniques and data structures. In this paper, we present I/O-efficient analogues of well-known data structures that we show to be useful for obtaining simpler and improved algorithms for several graph problems. Our results include improved algorithms for minimum spanning trees, breadth-first search, and single-source shortest paths. The descriptions of these algorithms are greatly simplified by their use of well-defined I/O-efficient data structures with good amortized performance bounds. We expect that I/O efficient data structures such as these will be a useful tool for the design-of I/O-efficient algorithms.

Configuration compression for the Xilinx XC6200 FPGA

One of the major overheads in reconfigurable computing is the time it takes to reconfigure the devices in the system. This overhead limits the speedups possible in this exciting new paradigm. In this paper we explore one technique for reducing this overhead: the compression of configuration datastreams. We develop an algorithm, targeted to the decompression hardware imbedded in the Xilinx XC6200 series FPGA architecture, that can radically reduce the amount of data needed to transfer during reconfiguration. This results in an overall reduction of almost 4 in total bandwidth required for reconfiguration.

Optimal emulations by butterfly-like networks

The power of butterfly-like networks as multicomputer interconnection networks is studied, by considering how efficiently the butterfly can emulate other networks. Emulations are studied formally via graph embeddings, so the topic here becomes : How efficiently can one embed the graph underlying a given interconnection network in the graph underlying the butterfly network ? Within this framework, the slowdown incurred by an emulation is measured by the sum of the dilation and the congestion of the corresponding embedding (respectively, the maximum amount that the embedding stretches an edge of the guest graph, and the maximum traffic across any edge of the host graph) ; the efficiency of resource utilization in an emulation is measured by the expansion of the corresponding embedding (the ratio of the sizes of the host to guest graph). Three main results expose a number of optimal emulations by butterfly networks. Call a family of graphs balanced if complete binary trees can be embedded in the family with simultaneous dilation, congestion, and expansion 0(1). (1) The family of butterfly graphs is balanced. (2) (a) Any graph < from a family of maxdegree-d graphs having a recursive separator of size S(x) can be embedded in any balanced graph family with simultaneous dilation O(log(d Σ i S(2 -i |G|))) and expansion O(1). (b) Any dilation-D embedding of a maxdegree-d graph in a butterfly graph can be converted to an embedding having simultaneous dilation O(D) and congestion O(dD). (3) Any embedding of a planar graph G in a butterfly graph must have dilation Ω(log Σ (G)/Φ(G), where : Σ(G) is the size of the smallest (1/3, 2/3)-node-separator of G, and Φ(G) is the size of Gs largest interior face. Applications of these results include : (1) The n-node X-tree network can be emulated by the butterfly network with slowdown O(log log n) and expansion 0(1) ; no embedding has dilation smaller than Ω(log log n), independent of expansion. (2) Every embedding of the n x n mesh in the butterfly graph has dilation Ω(log n) ; any expansion-O(1) embedding in the butterfly graph achieves dilation O(log n). These applications provide the first examples of networks that can be embedded more efficiently in hypercubes than in butterflies. We also show that analogues of these results hold for networks that are structurally related to the butterfly network. The upper bounds hold for the hypercube and the de Bruijn networks, possibly with altered constants. The lower bounds hold-at least in weakened form-for the de Bruijn network.

On the computational equivalence of hypercube-derived networks

The hypercube is both a powerful and a popular interconnection scheme for parallel computation. One of its drawbacks from a practical perspective is its unbounded (logarithmic) node degree. This has motivated interest in bounded-degree networks that can efficiently simulate hypercube computations. Many such hypercube-derived networks have been proposed, which generally fall into one of two classes: the butterfly-type networks (e.g., the butterfly and cube-connected cycles), and the shufletype networks (e.g., the shuffle-exchange and deBruijn graphs). We show that any computation which can be performed on a butterfly-type network in T steps can be performed on a shuffletype network with the same number of nodes in O(T) steps, and vice versa. This implies that all such hypercube-derived networks are computationally equivalent up to constant factors. In addition, this yields the first constant-slowdown simulation of the shuffle-exchange graph on the hypercube. *Supported by the Defense Advanced Research Projects Agency under Contracts NOOOl4-86-K-0593 and N0001489-J-1988, the Air Force under Contract OSR-86-0076, and a National Science Foundation Graduate Fellowship. Permission to copy without fee all or part of this material is granted provided that the copies arc not made or distributed for direct commercial advantage, the ACM copyright notice and the tide of the publication and its date appear, and notice is given that copying is by permission of the Association for Computing Machinery. To copy otbetwisc, or to republish, requires a fee and/or specific permission.

Worst-case performance of cellular channel assignment policies

Many cellular channel assignment policies have been proposed to improve efficiency beyond that resulting from fixed channel allocation. The performance of these policies, however, has rarely been compared due to a lack of formal metrics, particularly under nonhomogeneous call distributions. In this paper, we introduce two such metrics: the worst-case number of channels required to accommodate all possible configurations ofN calls in a cell cluster, and the set of cell states that can be accommodated withM channels. We first measure two extreme policies, fixed channel allocation and maximum packing, under these metrics. We then prove a new lower bound, under the first metric, on any channel assignment policy. Next, we introduce three intermediate channel assignment policies, based on commonly used ideas of channel ordering, hybrid assignment, and partitioning. Finally, these policies are used to demonstrate the tradeoff between the performance and the complexity of a channel allocation policy.

Improved parity-declustered layouts for disk arrays

Recently, parity-declustered layouts have been studied as a tool for reducing the time needed to reconstruct a failed disk in a disk array [5, 9]. Construction of such layouts for large disk arrays generally involves the use of a balanced incomplete block design (BIBD), a type of subset system over the set of disks. This research has been somewhat hampered by the dearth of general results and constructions for BIBDs on large sets, and by inefficiencies in some parity-distribution methods that create layouts that are larger than necessary. We make progress on these problems in several ways. In particular, we •Demonstrate a new BIBD construction that generalizes some previous constructions and yields a simpler BIBD that is optimally small in some cases. •Show how relaxing some of the balance constraints on data layouts leads to constructions of approximately-balanced layouts that greatly increase the number of feasible layouts for large arrays. •Give a new method for distributing parity that produces smaller data layouts, resulting in tight bounds on the size of the data layouts derived from BIBDs. Our results use a variety of algebraic, combinatorial, and graph-theoretic techniques, and together greatly increase the number of parity-declustered data layouts that are appropriate for use in large disk arrays.

Balancing Load versus Decreasing Communication

Mesh partitioning is an important step for parallel scientific applications, in particular finite element analyses. A good partitioner will minimize both the time spent on local computation and on interprocessor communication. It is often the case that these two goals cannot be satisfied simultaneously. In this paper, we use analytical and experimental results to illustrate the importance of considering the target architecture as well as the application when determining which factor to emphasize in a partitioning method. In particular, we derive a parameter ?0 that provides some guidelines as to which goal should be given primary focus. Our results yield two interesting facts: (1) allowing some load imbalance can provide some reduction in communication and total execution times and (2) as larger numbers of processors are applied to a problem, larger amounts of load imbalance are beneficial.

On bufferless routing of variable length messages in leveled networks

We study the most general communication paradigm on a multiprocessor, wherein each processor has a distinct message (of possibly distinct lengths) for each other processor. We study this paradigm, which we call chatting, on multiprocessors that do not allow messages once dispatched ever to be delayed on their routes. By insisting on oblivious routes for messages, we convert the communication problem to a pure scheduling problem. We introduce the notion of a virtual chatting schedule, and we show how efficient chatting schedules can often be produced from efficient virtual chatting schedules. We present a number of strategies for producing efficient virtual chatting schedules on a variety of network topologies.

Constant-slowdown simulations of normal hypercube algorithms on the butterfly network

Abstract The hypercube is both a powerful and a popular interconnection scheme for parallel computation. One of its drawbacks from a practical perspective is its logarithmic node degree. This has motivated the study of bounded-degree networks that can efficiently simulate hypercube computations. Two such networks that have received much attention are the butterfly network and the shuffle-exchange graph. While there exist simple constant-slowdown simulations of normal hypercube algorithms—algorithms that use only one dimension of hypercube edges at a time, and use adjacent dimensions at consecutive time steps—on the shuffle-exchange graph, the only such simulations known for the butterfly require a much more powerful model of network simulation. In this paper we present a simple algorithm for the simulation of normal hypercube algorithms on the butterfly network with constant slowdown, matching the best known result for the shuffle-exchange graph in terms of both slowdown and computational model.

Real-time emulations of bounded-degree networks

In this paper, we survey the state of the art in real-time emulations of various bounded-degree networks | that is, where one bounded-degree network performs an arbitrary computation of some other network with only a constant-factor degradation in both space and time. The results use a variety of techniques, from simple embeddings of one network structure into another to quite complex general emula-tions using redundant computation. We also present new results on the emulation of area-and volume-universal networks and trees of meshes on butterry networks. The results collected here give a complete view of current knowledge of the relative computational strength of many bounded-degree networks that have been considered as candidates for the underlying networks in parallel machines.