Eric M. Hayes

Database filter: optoelectronic design and implementation

The results of a successful demonstration of the selection module of an optoelectronic parallel-processing database filter is presented. The module utilizes 4 x 4 arrays of AND and XOR logic gates that respectively perform the functions of reducing the data fields and determining a match between the input data and a selection argument. The logic arrays were fabricated with InGaP/GaAs heterojunction phototransistors that drive vertical-cavity surface-emitting lasers (VCSELs). The VCSELs provide the free-space optical interconnection between stages. The design of the system and the optical power budget are discussed.

Comparison of techniques for bonding VCSELs directly to ICs

The fabrication technologies and bonding characteristics of three VCSEL bonding techniques are compared in order to determine the more reliable and robust.

Hybrid integration of VCSELs to foundry fabricated smart pixels

An opto-electronic integrated circuit (OEIC) smart pixel is a structure composed of optical inputs and/or outputs interconnected to electronic processing circuitry. The optical I/O allows the data to be read in 2-D page oriented formats. This circumvents the bottlenecks in the electrical interconnections and improves speed by reducing the capacitance and inductance of the wirebonds. Recently, we have reported the successful hybrid integration of VCSELs to a foundry fabricated OEIC by flip-chip bump-bonding a back-emitting VCSEL array. In this paper we present the results of improved integration processing and VCSEL design that will increase yields and mechanical and electrical robustness. In addition, a new approach to bonding VCSELs directly to the smart pixels is presented.

Development of a database filter based on optoelectronic smart pixel arrays

We presented here the design and initial demonstration of three optoelectronic database filters. Each of these systems is intended to serve as an interface between a page oriented optical storage devices and an electronic host computer. In addition to providing optical/electrical data conversion, each filter is capable of reducing the high data rate optical input to low data rate electronic signals compatible with conventional database management systems. For each filter, the system objectives and associated design trade offs are presented. Finally, an overall trend towards increasing pixel logic complexity while reducing optical system complexity is discussed.

8/spl times/8 array of smart pixels fabricated through the Vitesse foundry integrating MESFET, MSM, and VCSEL elements

This paper presents a new smart pixel design for a database filter which combines the four chips of a previous system into a single component chip. This eliminates many of the optical components, dramatically reduces the size of the system, and simplifies the optical alignment. The redesigned chip is being fabricated by Vitesse through the MOSIS foundry and uses MSM photodetectors and MESFETs instead of heterojunction phototransistors. VCSELs are flip-chip bump bonded to each pixel using a coplanar bonding technique similar to that developed by Goossen, et. al. (1995) for SEED devices. The paper will describe the pixel design and measured characteristics.

Performance of a silicon CMOS/VCSEL smart pixel for a recirculating sorter

Previously we have reported a proposed bitonic recirculating optoelectronic sorter. In this paper we present the performance of the smart pixels used to demonstrate the recirculating sorter. The smart pixels were implemented with CMOS circuitry fabricated through the MOSIS foundry, with integrated N well Si photodiodes, and wire bonded vertical cavity surface emitting lasers (VCSELs). This testbed was used to verify the functionality of the design and to determine the performance obtainable with this technology. Similar to our previously proposed reticulating bitonic sorter, the recirculating sorter we present here is comprised of two processing stages. Each stage is comprised of separately mounted chips of CMOS smart pixel and VCSEL arrays.

The oxide defined VCSEL-based smart pixels for the optical database filter

This paper presents the construction of the smart pixel arrays which perform AND and XOR functions with three-input and one-output optical signals for the application of an optical database filter. The device is based on oxide confined VCSELs bump bonded to GaAs MESFET pixels. The MSM photodetectors are monolithically integrated with MESFETs.

Surface emitting laser smart pixel arrays for large scale optoelectronic parallel processing

Surface emitting lasers are ideal light sources for optical parallel processing. This paper discusses the problems and possible solutions to the integration of these lasers into large pixel arrays. This paper examines the issues of optical absorption, choice of photodetector, type of receiver circuit and integration/packaging techniques required in order to achieve high frame rate with large arrays. The paper suggests the techniques that will most likely lead to a large, high performance processing array.

Vertical cavity surface emitting laser-based smart pixels with coplanar bump-bonded contacts

Integration of vertical cavity surface emitting lasers (VCSELs) onto a prefabricated smart pixel chip introduces fabrication problems since they can not be grown on foundry fabricated Si CMOS or GaAs MESFET circuit. This paper presents an approach to flip-chip bump-bonding VCSEL-arrays to a pixel chip in which each VCSEL is bonding directly to the appropriate pixel circuit. Thus, no added area is required and the interconnect capacitance is held to a minimum. The technique requires contacting both the n- and p-mirror of the VCSEL on the same side of the VCSEL chip and in the same plane. This allows bump bonding both contacts to the pixel chip and subsequent removal of the VCSEL chip substrate. The steps required to accomplish the VCSEL coplanar bonding include reactive ion etching of mesas and device separation in BCL3/Cl, electroplating a 4.5 micrometers high gold coplanar contact post, In/Sn alloy solder deposition, bonding to the smart pixel chip, and accurate alignment of the VCSEL and pixel chips, epoxy underfill and at last substrate removal.

An Optoelectronic Recirculating Sorter Based on CMOS/Vertical Cavity Surface Emitting Laser Smart Pixel Arrays ; Architecture and System Demonstration

The architecture of an optoelectronic recirculating sorter based on the hybrid integration of CMOS logic circuitry, silicon detector/receivers and vertical cavity surface emitting lasers is presented along with the demonstration of the system.