Essam Mina

Novel low-cost on-chip CPW slow-wave structure for compact RF components and mm-wave applications

In this paper, an ideal slow wave coplanar waveguide (CPW) structures with low losses, moderate impedance and CMOS fabrication technology have been developed. The slow wave CPW transmission line structures were achieved through IBM 0.13 mum technology with multi-layer metals. The CPW were implemented with narrower signal line or wider separation between signal and ground plane to increase the inductance per unit length, while metal strips on another metal layers cross under/above the CPW lines, which are orthogonal to signal propagation direction. Losses reduction using via bars to increase the thickness of the signal metal layer, structures with metal strip options (above, under and both CPW) to increase the capacitance per unit length of the CPW and provide more flexibility for the proposed structure, effect of the metal strips pitch are also discussed. The slow wave structure discussed in this paper can shrink the side dimension of the mm-wave passive components by up to 35%.

Modeling and implementation of on-chip millimeter-wave compact branch line couplers in a BiCMOS technology

In this paper, the modeling, design, and measurement of on-chip compact millimeter-wave branch line couplers are discussed. These couplers are realized with the Back End of Line (BEOL) wiring and enabled as a library device of a 0.13 micron SiGe BiCMOS process design kit. Like other library devices, this coupler device has a scalable layout pattern and a schematic symbol, which allows users to have couplers at different frequencies by inputting the dimensions. An accurate model for these branch line couplers is developed, which shows a good match with the measurements of the couplers designed for 60 GHz, 77 GHz and 94 GHz. Better than 19 dB return loss, better than 1.5 dB insertion loss and better than 21dB isolation have been observed. The side dimensions of these compact on-chip couplers are ranging from 440 microns to 530 microns.

On-Chip Millimeter-Wave Library Device - Scalable Wilkinson Power Divier/Combiner

On-chip millimeter wave Wilkinson power divider has been developed with the back end of line (BEOL) wiring and enabled as a library device in a 0.13 mum BiCMOS process design kit. The device layout and model are fully scalable, i.e. users can design a power divider at different frequencies or in different reference characteristic impedance systems by inputting the dimensions. Excellent model and hardware correlation has been observed up to 110 GHz. The measured results show that very good performance on-chip Wilkinson power dividers have been obtained in this technology, such as less than about 0.1 dB amplitude imbalance, about 0.8 dB of insertion loss with bandwidth of about 15% of the design frequency (defined at 15 dB return loss level) and about 20 dB of isolations. In addition, the device is the design rule check (DRC) clean and the layout versus schematic (LVS) enabled, which help to shorten the design cycle.

Wideband on-chip RF MEMS switches in a BiCMOS technology for 60 GHz applications

In this paper, an on-chip RF MEMS capacitive switch is designed and simulated with a 0.13 mum IBM SiGe BiCMOS technology for the first time. Mechanical and electrical design of the high frequency switch are discussed in this paper. Special consideration to improve Con/Coff ratio of the switch is used with multi metal layers configuration. The switch is designed for 60 GHz wireless applications, the results show that the switch has the insertion loss is less than 0.2 dB when the switch is off, while the isolation loss is larger than 15 dB when the switch is on over the frequency from 40 to 70 GHz. The calculated pull-in voltage of the switch is only about 10 volts, the switch is compact comparing with the reported PIN diode RF switch and has the membrane dimension of 10 mum x 240 mum.

Novel on-chip high performance slow wave structure using discontinuous microstrip lines and multi-layer ground for compact millimeter wave applications

In this paper, a novel on chip slow wave structure is developed. It is built with discontinuous microstrip steps, the discontinuous line is made by placing a wide and short line and a narrow and short line in turn and the step discontinuity provides with additional inductance and capacitance. The slow wave transmission line structures were achieved through IBM 45 nm technology with multi-layer metals. Simulated and measured results for slow wave transmission line are provided in the paper for design with different characteristics impedances. Results have shown that the inductance per unit length and capacitance per unit length of the line increased about 50% compared with the conventional transmission line structure. In addition, the length effect of the wide and narrow signal sections is thoroughly studied and results have shown that the smaller the pitch, the better the slow wave effect which agrees with [7] very well. A 75 GHz Branchline coupler built with the slow wave transmission lines has also been designed, and the coupler is 70% smaller than the conventional design.

Liquid Crystal Polymer-Based Planar Lumped Component Dual-Band Filters For Dual-Band WLAN Systems

This paper presents the design and implementation of dual-band filters using lumped components that are completely embedded in a multi-layer organic process technology, which incorporates multiple liquid crystalline polymer (LCP) substrates. The paper presents the design methodology and measurement results of the small form factor fully-integrated filters that are directly applicable to WLAN systems. The fully-functional embodiments of single-input single-output filters were designed to have passbands with independently controllable bandwidths around the center frequencies of 2.4 GHz and 5.2 GHz. The filters present low insertion loss (-1.1 dB) and return loss better than 15 dB at both the frequencies. The fully-packaged filters were designed in an area of 5.1 times 5.3 mm2, providing a 5X reduction in area as compared to any previously reported works on dual-band filters

Wideband millimeter wave pin diode spdt switch using ibm 0.13µm sige technology

Feasibility of wideband on-chip RF switch operating at millimeter wave frequencies using PIN diodes in IBM .13 mum SiGe technology is demonstrated. A SPDT reflective switch targeting 60 GHz wireless and radar applications is designed, fabricated, and measured. Good correlations between simulation and hardware are reported. Measured data show 2.0 to 2.7 dB of insertion loss over 51 to 78 GHz bandwidth with better than 12 dB return loss and 25 to 35 dB of isolation.

Silicon-based PIN SPST RF switches for improved linearity

Analysis of PIN diodes geometric effects on the performance of RF switches is presented with measured data. The impact of periphery-to-area ratio (P/A) is investigated in terms of forward bias resistance and linearity. Theoretical analysis shows the smaller periphery-to-area ratio of PIN diode can reduce not only the forward biased resistance, but also the power handling capability. In addition, positive bias to the PIN diodes cathode terminal can reduce the effects of Psub-Nwell parasitic diodes, leading to enhanced linearity. Fabricated in a standard 0.18-µm SiGe BiCMOS technology, the 50 µm2 PIN Single-pole-single-throw (SPST) RF switch MMIC can achieve an insertion loss of less than 0.69 dB from 2 to 18 GHz with the measured P1dB of 16 dBm.

On-Chip 3-D Model for Millimeter-Wave T-Lines with Gap Discontinuity in BiCMOS Technology

Although the discontinuity structures in the microstrip transmission lines such as a gap have been largely studied, the three-dimensional edge effects, skin effects and metal losses have hardly been analyzed in the model. In this paper, an accurate model which enable high predictability for electrical behavior of on-chip 3-D transmission line with gap discontinuity is developed from equations generated with conformal mapping techniques. The model has also been used to develope gap as a library device with schematic symbol, layout parameterized cell (PCell). T-line with gap has been implemented with back end of line (BEOL) in 0.13 mum SiGe BiCMOS technology. Good correlations have been achieved up to 120 GHz among EM simulation, measurement and model, less than 2.3deg phase difference and less than 1.59 dB coupling magnitude have been achieved for all the cases. The model is scalable and can be used for the design of mm-wave passive components as well as the guideline for high density interconnects layout.

On-chip high performance slow wave transmission lines using 3D steps for compact millimeter wave applications

Slow wave coplanar waveguide structures have been designed and implemented with the 3D steps; include alternating high and low impedance sections. The high impedance section is built with a narrow (w1), thin (t1) short (s) line and designed to have line inductance nL; the low impedance section is built with wide (w1), thick (t1) short (s) line and is designed with line capacitance nC, where L and C are the line inductance and capacitance per unit length of the conventional transmission line with given characteristic impedance respectively. The slow wave transmission line structures were achieved through IBM 45nm technology with multi-layer metals. Results for slow wave transmission lines are provided in the paper for design with different characteristics impedances. Results have shown that the inductance per unit length and capacitance per unit length of the line increased at least 40% compared with the conventional slow wave transmission line structure, which means a reduction of 30% wavelength and 50% chip area of a branch line coupler. The slow wave effect can be controlled by using different w1/w2, t1/t2 and s. In addition, detailed design guide to improve the slow wave effect are presented in the paper.