Etienne Cornu

ETSI AMR-2 VAD: evaluation and ultra low-resource implementation

The ETSI AMR-2 VAD is rigorously evaluated in clean and noisy conditions. The VAD is then simplified and optimized for porting to an ultra low-resource DSP system using a fast oversampled DFT filterbank. The parameters of the low-resource VAD are optimized using two speakers and 6 types of noise at SNRs from -10 to 20 dB. The VAD is then tested by employing sentences from two other speakers and 12 different types of noise. Results show that the low-resource VAD offers a performance comparable to that of the ETSI VAD in both clean and noisy conditions. When deployed on a custom DSP running at a clock speed of 1.28 MHz and consuming less than 1 milliWatt of power, the low-resource VAD uses less than 30% of the available system resources.

An Ultra-Low Power Subband-Based Electronic Stethoscope

Electronic stethoscopes are able to offer signal amplification and other benefits over traditional stethoscopes. However, many electronic stethoscopes rely on a personal computer for their signal processing, which reduces portability and requires a relatively large amount of power. This paper presents a low power, portable electronic stethoscope system that is based on a signal processing approach using an over-sampled filterbank. This system is implemented on an ultra-low resource DSP system. The stethoscope incorporates multiple filtering modes as well as audio record and playback (full and half speed) functionality

Low-power implementation of the Bluetooth subband audio codec

This paper describes a low-power implementation of the Bluetooth subband codec (SBC) for high-fidelity wireless audio. The design uses a configurable weighted overlap-add (WOLA) filterbank coprocessor to implement the analysis and synthesis filterbanks. A new method to convert the two-times over-sampled, complex WOLA subband signals to equivalent critically sampled, real-valued SBC subband signals is presented. The WOLA coprocessor allows for an efficient parallel implementation of the filterbank and quantization portions of the SBC algorithm. Details of the overall system design are also presented, including measurements of power consumption and resource requirements. The final real-time, fixed-point implementation is compared to an off-line floating-point reference and found to produce no audible difference in decoded signal quality.

Ultra low-power sub-band acoustic echo cancellation for wireless headsets

Integrating voice-processing algorithms into headsets is a challenging task due to size and power constraints. As a result of the small size of these headsets, acoustic leakage between the closely located speaker and microphone is a common problem. To address this problem, an oversampled sub-band adaptive acoustic echo cancellation system is proposed and implemented on an ultra-low resource DSP system. The echo cancellation algorithm is integrated with two voice activity detectors and double-talk detection logic to provide a fully functional system. By using decimation, load balancing and other optimization techniques, the complete system consumes about 6 mW. Other signal-processing algorithms can be added with very little impact on power consumption and no impact on size. Tests on a Bluetooth headset show an echo return loss enhancement of about 15 dB for a typical headset signal level.

Real-time speech synthesis on an ultra low-resource, programmable DSP system

An efficient implementation of a time-domain speech synthesis system on an ultra low-power, miniature, programmable block-floating-point DSP system is introduced. The DSP system, operating at a clock rate as low as 1.28 MHz, is well suited for speech and audio processing applications. Similar to the MBR-PSOLA technique, this time-domain synthesis method uses a normalized speech database generated by a high-quality harmonic synthesis. To reduce the memory usage and communication bandwidth, the normalized database is compressed using a block-adaptive, ADPCM approach. Listening tests comparing the synthetic speech quality on the DSP system and the same method implemented on a high-resource computer system show no degradations due to the memory, register length, or other low-resource limitations on the DSP system. The system consumes less than 1 mW at 1 volt.