F. Galvez-Durand

A CCCS for high frequency filters

In this paper we propose a novel CCCS with output conductance less than 10/sup -8/ mhos and harmonic distortion less than 0.6% at 33 MHz, low sensitivity to mismatches and 0.7 mW power consumption when driven with /spl plusmn/2.5 V power, supplies. A high performance OTA (Operational Transconductance Amplifier) was designed using this CCCS and tested in a 10 MHz 5th order elliptic lowpass OTA-C filter fed with /spl plusmn/2.5 V. The filter THD was less than 1% for V/sub in/=1V(pp) at the cutoff frequency in the 8 MHz to 12 MHz range.<<ETX>>

A methodology for dynamic power consumption estimation using VHDL descriptions

Power consumption became an important feature to be considered in system implementations. This work presents a methodology for dynamic power consumption estimation using hardware descriptions written in VHDL; a library with information for transitions and power consumption for all components of the target library is created. A case study for the KASUMI cryptographic algorithm is reported. This algorithm was chosen to compose the 3rd Generation Partnership Project (3GPP) security functions for mobile systems. Restrictions imposed by the 3GPP to the hardware implementation of the KASUMI cryptographic algorithm were analyzed and satisfied; our dynamic power consumption estimation methodology is used. Only CMOS technologies are discussed in this paper.

OTA-C filters with finite zeros and without floating capacitors

In this paper we present a novel technique for OTA-C filter realizations with finite zeros based on doubly loaded passive ladder networks. Only grounded capacitors are needed; all floating capacitors are replaced with active simulations eliminating bottom-plate parasitic capacitors and non-observable poles. Bandpass, highpass and bandstop filters are easily obtained from a lowpass OTA-C prototype applying standard frequency transformations that preserve the active simulation of floating capacitors, i,e., the finite zeros realization. Also, some stability problems of highpass and bandstop filters are briefly addressed.

OTA-C Filters with Finite Zeros

In this paper we present a novel technique for OTA-C filter realizations with finite zeros based on doubly loaded passive ladder networks. Only grounded capacitors are needed; all floating capacitors are replaced with active simulations eliminating bottom-plate parasitic capacitors and non-observable poles. Bandpass, highpass and bandstop filters are easily obtained from a lowpass OTA-C prototype applying standard frequency transformations that preserve the active simulation of floating capacitors, i.e. the finite zeros realization. Also, we address the high frequency stability problem of highpass and bandstop OTA-C filters simulating doubly loaded passive ladder networks. These filters usually have floating nodes where the OTA excess-phase acting over the nodal parasitic capacitance can introduce unstable poles at high frequencies. The stability problem is fairly the same for highpass and bandstop OTA-C filters based on approximations with and without finite zeros; only the most complex case (filters with finite zeros) will be addressed here.

Stability of highpass and bandreject analog continuous-time OTA-C filters

In this paper we address the high frequency stability problem of highpass and bandreject OTA-C filters simulating doubly loaded passive ladder networks. These filters usually have floating nodes where the OTA excess-phase acting over the nodal parasitic capacitance can introduce unstable poles at high frequencies. Fortunately, the filters discussed here can be conveniently modeled at high frequencies in order to clearly explain how the OTA excess-phase acts over the floating nodes. Based on the understanding of this mechanism, a very simple modeling approach allows us to propose an appropriate and very simple stabilization procedure. The stability problem is fairly the same for highpass and bandreject OTA-C filters based on approximations with and without finite zeros. A novel technique for OTA-C filter with finite zeros realizations is used. Only grounded capacitors are needed; all floating capacitors are substituted using active simulation, eliminating bottom plate parasitic capacitor effects and non-observable poles.

System on a chip for petroleum pipeline inspection

The present paper describes the implementation and experimental results of the DAQP02 system on a chip (SoC) for petroleum pipeline inspection. This integrated circuit is able to read and process information about physical phenomena inside pipelines. The DAQP02 has two multiplexed analog inputs, one 8-bit A/D converter, an 8-bit data bus and a 22-bit address bus. Due to its small dimensions and low power consumption features, it is an efficient in-line inspection tool. The integrated circuit was manufactured in CMOS 0.8 /spl mu/m double poly, double metal, n-well technology.

Data acquisition system processor for petroleum pipes

A VLSI implementation of a data acquisition system processor for failure detection and location inside oil pipelines is presented. The DAQP02 prototype is capable of reading and storing information inside pipelines. With support for two analog signals and a 22 bits address bus, the DAQP02 is an efficient solution for in-line inspection tools known as Smart Pig. The main goal for this implementation is to minimize the physical dimension and power consumption of these equipments. The DAQP02 was manufactured in CMOS 0.8 /spl mu/m double poly, double metal, n-well technology. The experimental results agree with simulations.

Odd-order current-mode lowpass filters with finite zeros

A novel analogue continuous-time current-mode filter synthesis technique is proposed based on transformed set of state-equations that allow the utilization of only current-mode integrators; current-mode gyrators specifically designed are not necessary. The technique has been successfully used for synthesizing a 5th order lowpass elliptic filter from a passive doubly loaded ladder prototype. Only grounded capacitors are necessary; all floating capacitors and inductors are replaced with active simulations. Small-signal analyses have shown this filter performs well, preserving the low sensitivity inherent to the passive ladder prototype.

Low-voltage current-mode analogue continuous-time filters

A novel current-mode analogue continuous-time filter synthesis technique is proposed based on a transformed set of state-equations, that allow the utilization of only current-mode linear lossy-integrators implemented using standard current mirrors; also a novel current-mode gyrator is introduced. The technique has been successfully used for synthesizing low-voltage 5th order lowpass, highpass, bandpass and stopband Chebyshev filters from passive doubly loaded ladder prototypes. SPICE simulations using CMOS standard process level 2 parameters have shown these filters perform well, exhibiting a THD less than 1% at 100 kHz for a 40 mV output (1 µA input current) while the bias current per transistor is 10 RA. Also, a Monte Carlo analysis has shown these filters preserve the low sensitivity inherent to the passive ladder prototype. The reduced number of small transistors necessary leads to small integration areas. The circuits have been fed with ±1.5 V power supplies.

A wide dynamic range compensated OTA for balanced filters

In this paper we propose an operational transconductance amplifier (OTA) with DC gain greater than 80 dB, improved frequency response and wide linear dynamic input range. Also, we propose a novel common mode feedback circuit, necessary for balanced filter common mode voltage stabilization. An elliptic low-pass filter simulated using this OTA exhibits a THD less than 1% while varying its cutoff frequency from 8 MHz to 12 MHz for a 0.8 V/sub pp/ differential input and /spl plusmn/2.5 V power supply.