F. Medjdoub

Can InAlN/GaN be an alternative to high power / high temperature AlGaN/GaN devices?

The performance of novel AlInN/GaN HEMTs for high power / high temperature applications is discussed. With 0.25 mum gate length the highest maximum output current density of more than 2 A/mm at room temperature and more than 3 A/mm at 77 K have been obtained even with sapphire substrates. Cut-off frequencies were fT = 50 GHz and fMAX = 60 GHz for 0.15 mum gate length without T-gate. Pulsed measurements reveal a less unstable surface than in the case of AlGaN/GaN structures. Although limited by buffer layer leakage, with field plates a maximum drain bias of 100 V has been reached with these devices. The high chemical stability of this unstrained heterostructure and its surface has been demonstrated with successful operation at 1000 degC in vacuum

Barrier-Layer Scaling of InAlN/GaN HEMTs

We discuss the characteristics of high-electron mobility transistors with barrier thicknesses between 33 and 3 nm, which are grown on sapphire substrates by metal-organic chemical vapor deposition. The maximum drain current (at VG = 2.0 V) decreased with decreasing barrier thickness due to the gate forward drive limitation and residual surface-depletion effect. Full pinchoff and low leakage are observed. Even with 3-nm ultrathin barrier, the heterostructure and contacts are thermally highly stable (up to 1000degC).

InAlN/GaN MOSHEMT With Self-Aligned Thermally Generated Oxide Recess

We report on lattice-matched InAlN/GaN MOSHEMTs with an oxide-filled recess, self-aligned to the gate prepared by thermal oxidation at 800degC in oxygen atmosphere. The device delivered a maximum current density of 2.4 A/mm. Pulse measurements showed no apparent lag effects, indicating a high-quality native oxide. This was confirmed by monitoring the radio-frequency load lines in the time domain. The MOSHEMT yielded a power density of 6 W/mm at a drain voltage as low as 20 V and at 4 GHz, a power added efficiency of 32% and an ft and f max of 61 and 112 GHz, respectively, illustrating the capability of such MOSHEMT to operate at high frequencies.

AlInN/GaN a suitable HEMT device for extremely high power high frequency applications

AlInN/GaN unpassivated high electron mobility transistor (HEMT) on sapphire substrate has yielded a maximum drain current density close to 2 A/mm in steady state. Superior gate length downscaling than AlGaN/GaN devices has been observed owing to the possibility of the use of ultra thin barrier layer while keeping extremely high sheet carrier density. We reached an extrinsic current gain cut-off frequency of 70 GHz for a 0.08 mum gate length device. Large signal measurements reveal a relatively low RF power dispersion. Indeed, at 10 GHz we performed for the first time power measurements on such a HEMT structure. We achieved 1.5 W/mm output power density at low bias condition (VDS = 15V) in agreement with the expected power in spite of a strong thermal effect due to the sapphire substrate, a large leakage current in the Schottky diode characteristic and a low buffer layer resistivity. These results demonstrate the great potential of this structure for extremely high power high frequency applications.

InAlN/GaN heterostructures for microwave power and beyond

InAlN/GaN is indeed an alternative to the common AlGaN/GaN heterostructure in electronics and sensing. It enables operation at extremely high temperature once problems with contact metallization and passivation have been solved. It is the only heterostructure known presently, which allows overgrowth of high quality diamond films to combine two of the most stable semiconductors. Thus, applications reach from high power microwaves systems and high temperature electronics to sensing in harsh environment.

Barrier layer downscaling of InAIN/GaN HEMTs

In this study we have investigated heterojunctions on sapphire with barrier thicknesses between 13 nm and 5 nm maintaining a high output current. The results indicate that InAlN/GaN HEMT device structures can be reliably designed and fabricated with barrier layer thicknesses approaching the tunnelling thickness and approaching enhancement mode characteristics. Using Al2O3 as high-k gate dielectric also high aspect ratio MOSHEMTs could be designed with comparable characteristics to MESHEMTs of the same barrier thickness. This is an ongoing study and results on further barrier downscaling experiments will be presented.

Thermal stability of 5 nm barrier InAlN/GaN HEMTs

In this paper, the properties of 5 nm barrier HEMT devices has been investigated in a temperature ramping experiment as used for AlGaN/GaN devices. The pinch-off voltage remains identical and the Schottky diode leakage only marginally increased. The ohmic contacts, which have been alloyed at 850 degC by RTA show also exceptional stability. The initial alloying cycle still kept the alloy front just out of reach for high tunnelling probability. It has been moved within this distance in a very controlled way, however without degrading the contact resistance by the 1000 degC post alloying cycle. In conclusion, the InAlN/GaN heterojunction is exceptionally stable even for barrier thicknesses below 10 nm. Experiments for barrier thicknesses of approx. 2.5 nm (verified by a pinch-off voltage of -0.8 V) are presently performed and results will be reported.

InAlN/GaN MOS-HEMT WITH THERMALLY GROWN OXIDE

We report on the investigation of lattice matched InAlN/GaN MOS-HEMT structures prepared by thermal oxidation at 800 °C in oxygen atmosphere for two minutes. The gate leakage current was reduced by two orders of magnitude. Pulse measurements showed lag effects similar to what is observed for devices without oxidation, indicating a high quality native oxide. The MOS-HEMT showed no degradation in the small signal characteristics and yielded a power density of 5 W/mm at 30 V drain voltage at 10 GHz, power added efficiency of 42% and Ft and Fmax of 42 and 61 GHz respectively, illustrating the capability of such MOS-HEMT to operate at high frequencies.

A Concept for Diamond Overlayers on Nitride Heterostructures

The development of diamond overlayers with high crystalline quality for high power devices in Si, GaAs or GaN, aimed at heat extraction from the top, has been a quest for many years. Recently CMOS circuits have been coated by untra-nano-crystalline-diamond (UNCD) grown at 350 C, however with low thermal conductivity due to a substantial graphitic grain boundary content [1]. Usual growth conditions for nanocrystalline diamond (NCD) films of high thermal conductivity are a temperature above 600 C in hydrogen atmosphere with high H* radical concentration and CH4 growth chemistry. In fact, no such overlayer with high thermal conductivity has been developed to our knowledge up to now for GaAs or GaN. However, GaN based power devices are already presently seriously limited by their thermal losses and even the employment of diamond substrate heat spreaders may not be sufficient. Such substrate heat spreader configurations are usually realized by joining prefabricated semiconductor and diamond materials stacks by alloying or wafer bonding.

Monte Carlo study of the breakdown of an AlInAs/GaInAs HEMT on InP with an InP etch stop layer

This paper deals with the evaluation of AlInAs/GaInAs HEMTs (high electron mobility transistors) with an InP etch stop layer (IESL) for power applications in the millimeter and submillimeter wave ranges. We use a 2D Monte Carlo model in order to analyze the capability of the device to handle high voltage with small gate length.