F. Spinella

A VLSI processor for fast track finding based on content addressable memories

We describe a VLSI processor for pattern recognition based on content addressable memory (CAM) architecture, optimized for on-line track finding in high-energy physics experiments. A large CAM bank stores all trajectories of interest and extracts the ones compatible with a given event. This task is naturally parallelized by a CAM architecture able to output identified trajectories, recognized among 2/sup 96/ possible combinations, in just a few 40 MHz clock cycles. We have developed this device (called the AMchip03 processor) for the silicon vertex trigger (SVT) upgrade at CDF using a standard-cell VLSI design methodology. This approach provides excellent pattern density, while sparing many of the complexities and risks associated to a full-custom design. On the other hand, the cost performance ratio is well more than one order of magnitude better than an FPGA-based design. This processor has a flexible and easily configurable structure that makes it suitable for applications in other experimental environments. We look forward to share this technology.

The AMS-02 electromagnetic calorimeter

Abstract The Electromagnetic Calorimeter (ECAL) of the AMS-02 experiment is a lead-scintillanting fibers sampling calorimeter characterized by high granularity that allows to image the longitudinal and lateral showers development, a key issue to provide high electron/hadron discrimination. The light collection system and the FE electronics are designed to let the calorimeter operate over a wide energy range from few GeV up to 1 TeV. A full-scale prototype of the e.m. calorimeter was tested at Cern in October 2001 using electrons and pions beams with energy ranging from 3 to 100 GeV. Effective sampling thickness, linearity and energy resolution were measured.

Reprogrammable Acquisition Architecture for Dedicated Positron Emission Tomography

We have developed a flexible, cost-efficient PET architecture adaptPositron Emission Tomographyable to different applications and system geometries, such as positron emission mammography (PEM) and in-beam PET for dose delivery monitoring (ibPET). The acquisition system has been used to implement modularized dual planar detectors with very low front-end dead time, as required in PEM or in ibPET. The flexibility is obtained thanks to the FPGA-based, reprogrammable, TDC-less coincidence processor. The final goal is to propose an effective acquisition methodology and the construction of a compact, low-cost instrument able to provide early diagnosis and to improve the effectiveness of follow-up studies for smaller tumours with respect to those studied with present clinical equipment (e.g., whole-body PET, SPECT, or scintigraphy).

The FPGA based trigger and data acquisition system for the CERN NA62 experiment

The main goal of the NA62 experiment at CERN is to measure the branching ratio of the ultra-rare K+??+? decay, collecting about 100 events to test the Standard Model of Particle Physics. Readout uniformity of sub-detectors, scalability, efficient online selection and lossless high rate readout are key issues. The TDCB and TEL62 boards are the common blocks of the NA62 TDAQ system. TDCBs measure hit times from sub-detectors, TEL62s process and store them in a buffer, extracting only those requested by the trigger system following the matching of trigger primitives produced inside TEL62s themselves. During the NA62 Technical Run at the end of 2012 the TALK board has been used as prototype version of the L0 Trigger Processor.

Silicon vertex tracker: a fast precise tracking trigger for CDF

The Silicon Vertex Tracker (SVT), currently being built for the CDF II experiment, is a hardware device that reconstructs 2-D tracks online using measurements from the Silicon Vertex Detector (SVXII) and the Central Outer Tracker (COT). The precise measurement of the impact parameter of the SVT tracks will allow, for the first time in a hadron collider environment, to trigger on events containing B hadrons that are very important for many studies, such as CP violation in the b sector and searching for new heavy particles decaying to b . In this report we describe the overall architecture, algorithms and the hardware implementation of the SVT.

The CDF-II time-of-flight detector

A Time-of-Flight (TOF) detector, based on plastic scintillator and fine-mesh photomultiplier tubes, has been added to the CDF-II experiment. Since August 2001, the TOF system has been fully instrumented and integrated into the CDF-II data acquisition system. The TOF system will provide particle identification of low momentum charged pions, kaons and protons in -collisions. With a design resolution goal of about 100 ps, separation between charged kaons and pions is expected at the 2 sigma level for momenta below 1.6 GeV/c, which enhances CDFs b-flavor tagging capabilities. They describe the design of the TOF detector and discuss its on-line and off-line calibration. Some performance benchmarks using proton-antiproton collision data are presented.

The SVT Hit Buffer

The Hit Buffer is part of the Silicon Vertex Tracker [1], a trigger processor dedicated to the reconstruction of particle trajectories in the Silicon Vertex Detector [2] and the Central Tracking Chamber of the Collider Detector at Fermilab. The Hit Buffer is a high speed data-traffic node, where thousands of words are received in arbitrary order and simultaneously organised in an internal structured data base, to be later promptly retrieved and delivered in response to specific requests. The Hit Buffer is capable to process data at a rate of 25 MHz, thanks to the use of special fast devices like Cache-Tag RAMs and high performance Erasable Programmable Logic Devices from the XILINX XC7300 family.

The CDF online silicon vertex tracker

The CDF Online Silicon Vertex Tracker (SVT) reconstructs 2D tracks by linking hit positions measured by the Silicon Vertex Detector to the Central Outer Chamber tracks found by the eXtremely Fast Tracker (XFT). The system has been completely built and assembled and it is now being commissioned using the first CDF run II data. The precision measurement of the track impact parameter will allow triggering on B hadron decay vertices and thus investigating important areas in the B sector, like CP violation and B(s) mixing. In this paper we briefly review the architecture and the tracking algorithms implemented in the SVT and we report on the performance of the system achieved in the early phase of CDF run II.

First steps in the silicon vertex trigger upgrade at CDF

The silicon vertex trigger (SVT) in the CDF experiment at Fermilab performs fast and precise track finding and fitting at the second trigger level and has been a crucial element in data acquisition for Run II physics. However as luminosity rises, multiple interactions increase the complexity of events and thus the SVT processing time, reducing the amount of data CDF can record. The SVT upgrade aims to increase the SVT processing power to restore at high luminosity the original CDF DAQ capability. We describe the first steps in the SVT upgrade, consisting of a new associative memory with 4 times the number of patterns, and a new track fitter to take advantage of these patterns. We describe the system, its tests and its performance

A high-resolution TDC-based board for a fully digital Trigger and Data AcQuisition system in the NA62 experiment at CERN

A time-to-digital converter-based system, to be used for most subdetectors in the high-flux rare-decay experiment NA62 at CERN SPS, was built as part of the NA62 fully digital trigger and data acquisition system in which the TDC Board (TDCB) and a general-purpose motherboard (TEL62) will play a fundamental role. While TDCBs, housing four high-performance time-to-digital converters (HPTDCs), measure hit times from subdetectors, the motherboard processes and stores them in a buffer, produces trigger primitives from different detectors, and extracts only data related to the lowest trigger level decision, once this is taken on the basis of the trigger primitives themselves. The features of the TDCB developed by the Pisa NA62 group are extensively discussed and performance data are presented in order to show its compliance with the experiment requirements.