Fabian Khateb

Low-voltage bulk-driven rectifier for biomedical applications

This paper introduces the novel design of a low-voltage low-power voltage rectifier based on bulk-driven (BD) winner-take-all (WTA) circuit. The proposed circuit is able to work as a half- or full-wave rectifier and it is specifically designed for battery-powered implantable and wearable medical devices. The main attractive features of the proposed circuit are topology simplicity, minimal number of transistors, accuracy and capability of rectifying signals with a relatively wide range of frequencies and amplitudes. The circuit was designed with single voltage supply of 0.6V and consumes about 2.14@?W. Detailed simulations using TSMC 0.18@?m n-well CMOS technology were performed to prove the functionality and to fully characterize the circuit performance.

Fractional-order filters based on low-voltage DDCCs

This paper presents the design and implementation of fractional-order filters based on promising CMOS structure of Differential Difference Current Conveyor (DDCC), which was designed and fabricated using the 0.35µm CMOS AMIS process. The derivation of the filters has been achieved using a second-order approximation of the corresponding fractional-order transfer functions. The filters offer the benefit of low-voltage (?500mV) operation as well as the requirement of grounded passive elements. In addition, a technique for the quick derivation of high-order filters has been introduced. The simulation and experimental results prove the attractive performances of the proposed filters.

Comparative study of sub-volt differential difference current conveyors

Enhancing the performances of analog circuits with sub-volt supplies becomes a great challenge for circuit designers. Techniques such as bulk-driven (BD) and quasi-floating gate (QFG) count among the suitable ones for ultra-low voltage (ULV) operation capability with extended input voltage range and simple CMOS circuitry. However, in comparison to the conventional gate-driven (GD) MOS transistor (MOST), these techniques suffer from several disadvantages such as low transconductance value and bandwidth that limit their applicability for some applications. Therefore, the idea of merging the BD and QFG techniques to eliminate their drawbacks appears as efficacious solution. This new merging is named bulk-driven quasi-floating gate (BD-QFG)* technique and in order to demonstrate its advantages in compassion to BD and QFG ones, this paper presents a comparison study of three ULV differential difference current conveyor (DDCC) blocks based on BD, QFG and BD-QFG techniques. The significant increment of the transconductance and the bandwidth values of the BD-QFG are clearly observed. The proposed CMOS structures of the DDCCs work at ?300mV supply voltage and 18.5?W power consumption. The simulation results using 0.18?m CMOS n-Well process from TSMC show the features of the proposed circuits.

High-Precision Differential-Input Buffered and External Transconductance Amplifier for Low-Voltage Low-Power Applications

Recently, the demand for low-voltage low-power integrated circuits design has grown dramatically. For battery-operated devices both the supply voltage and the power consumption have to be lowered in order to prolong the battery life. This paper presents an attractive approach to designing a low-voltage low-power high-precision differential-input buffered and external transconductance amplifier, DBeTA, based on the bulk-driven technique. The proposed DBeTA possesses rail-to-rail voltage swing capability at a low supply voltage of ±400 mV and consumes merely 62 μW. The proposed circuit is a universal active element that offers more freedom during the design of current-, voltage-, or mixed-mode applications. The proposed circuit is particularly interesting for biomedical applications requiring low-voltage low-power operation capability where the processing signal frequency is limited to a few kilohertz. An oscillator circuit employing a minimum number of active and passive components has been described in this paper as one of many possible applications. The circuit contains only a single active element DBeTA, two capacitors, and one resistor, which is very attractive for integrated circuit implementation. PSpice simulation results using the 0.18 μm CMOS technology from TSMC are included to prove the unique results.

0.4-V bulk-driven differential-difference amplifier

A new solution for an ultra-low-voltage, low-power, bulk-driven fully differential-difference amplifier (FDDA) is presented in the paper. Simulated performance of the overall FDDA for a 50nm CMOS process and supply voltage of 0.4V, shows dissipation power of 31.8µW, the open loop voltage gain of 58.6dB and the gain-bandwidth product (GBW) of 2.3MHz for a 20pF load capacitance. Despite the very low supply voltage, the FDDA exhibits rail-to-rail input/output swing. The circuit performance has also been tested in two applications; the differential voltage follower and the second-order band-pass filter, showing satisfactory accuracy and dynamic range. Display Omitted

Utilizing the Bulk-driven technique in analog circuit design

The last few decades, a great deal of attention has been paid to low-voltage (LV) low-power (LP) integrated circuits design since the power consumption has become a critical issue. Among many techniques used for the design of LV LP analog circuits, the Bulk-driven principle offers a promising route towards this design for many aspects mainly the simplicity and using the conventional MOS technology to implement these designs. This paper is devoted to the Bulk-driven (BD) principle and utilizing this principle to design LV LP building blocks of Current Mirror (CM), Enhanced Current Mirror (ECM), Operational Transconductance Amplifier (OTA), Current Conveyor (CCII) and Current Differencing Transconductance Amplifier (CDTA) in standard CMOS processes and supply voltage ±0.7 V. The simulation results have been carried out by the Spice simulator using the 0.25 μ CMOS technology from TSMC.

ULTRA-LOW VOLTAGE TUNABLE TRANSCONDUCTOR BASED ON BULK-DRIVEN QUASI-FLOATING-GATE TECHNIQUE ¤

This paper presents ultra-low voltage transconductor using a new bulk-driven quasi-°oating- gate technique (BD-QFG). This technique leads to signicant increase in the transconductance and the bandwidth values of the MOS transistor (MOST) under ultra-low voltage condition. The proposed CMOS structure of the transconductor is capable to work with ultra-low supply voltage of � 300mV and low power consumption of 18 � W. The transconductance value of the transconductor is tunable by external resistor with wide linear range. To prove the validation of the new described technique a second-order Gm-C multifunctionlter is presented as one of the possible applications. The simulation results using 0.18 � m CMOS N-Well process from TSMC show the attractive features of the proposed circuit.

Sub-Volt Fully Balanced Differential Difference Amplifier

This paper presents a new CMOS structure for a fully balanced differential difference amplifier (FB-DDA) designed to operate from a sub-volt supply. This structure employs the bulk-driven quasi-floating-gate (BD-QFG) technique to achieve the capability of an ultra-low voltage operation and an extended input voltage range. The proposed BD-QFG FB-DDA is suitable for ultra-low-voltage low-power applications. The circuit is designed with a single supply of 0.5 V and consumes only 357 nW of power. The proposed circuit was simulated in a 0.18-μm TSMC CMOS technology and the simulation results prove its functionality and attractive parameters. An application example of a state variable filter is also presented to confirm the usefulness of the proposed BD-QFG FB-DDA.

0.5 V fully differential current conveyor using bulk-driven quasi-floating-gate technique

This study presents a new low-voltage (LV) supply and low-power consumption bulk-driven quasi-floating-gate fully differential current conveyor (BD–QFG-FDCCII) active element which is suitable for LV signal processing applications. The bulk-driven technique is used to achieve LV supply as low as a 0.5 V and extended input voltage swing. On the other hand, the quasi-floating-gate technique is used to achieve high-frequency performance. To prove the workability of the proposed circuit, new voltage-mode biquadratic filter and fifth-order leap-frog low-pass filter using BD–QFG-FDCCIIs as active devices have been designed and illustrated in this study. The functionality of the proposed circuits is demonstrated through PSPICE simulations using Taiwan Semiconductor Manufacturing Company (TSMC) 0.18 µm n-well complementary metal–oxide–semiconductor technology with a 0.5 V supply voltage and a power consumption of 16.1 µW.

Ultra-low voltage CMOS current-mode four-quadrant multiplier

A novel configuration of a four-quadrant current multiplier is introduced in this paper. The realisation is achieved through the utilisation of the voltage translinear principle; the derived topology simultaneously offers the attractive benefits of ultra-low voltage operation and reduced DC power dissipation, in comparison with the corresponding already published multipliers. The above have been achieved without increasing the circuit complexity. The behaviour of the multiplier has been evaluated through simulation results, using the Analog Design Environment and the design kit provided by the Taiwan Semiconductor Manufacturing Company 180 nm complementary metal-oxide semiconductor process.