Fabien Parrain

Electrically induced stimuli for MEMS self-test

A major problem for applying self-test techniques to MEMS is the multi-domain nature of the sensing parts that require special test equipment for stimuli generation. In this work we describe, for three different types of MEMS that work in different energy domains, how the required nonelectrical test stimuli can be induced onchip by means of electrical signals. This provides the basis for adding BIST strategies for MEMS parts embedded in the coming generation of integrated systems. The first case corresponds to an accelerometer as a review of a classical example. The last two cases correspond to piezoresistive and infrared sensors that we use in innovative applications under development in our Laboratory, and for which the self-test methods are new to our knowledge. The last case is also illustrated as a complete application that corresponds to an infrared imager. The on-chip test signal generation proposed requires only slight modifications and allows production test of the imager with a standard test equipment, without the need of special infrared sources and the associated optical equipment. The test function can also be activated off-line in the field for validation and maintenance purposes.

Generation of Electrically Induced Stimuli for MEMS Self-Test

A major task for the implementation of Built-In-Self-Test (BIST) strategies for MEMS is the generation of the test stimuli. These devices can work in different energy domains and are thus designed to sense signals which are generally not electrical. In this work, we describe, for different types of MEMS, how the required non-electrical test stimuli can be induced on-chip by means of electrical signals. This provides the basis for adding BIST strategies for MEMS parts embedded in the coming generation of integrated systems. The on-chip test signal generation is illustrated for the case of MEMS transducers which exploit such physical principles as time-varying electrostatic capacitance, piezo-resistivity effect and Seebeck effect. These principles are used in devices such as accelerometers, infrared imagers, pressure sensors or tactile sensors. For implementation, we have used two major MEMS technologies including CMOS-compatible bulk micromachining and surface micromachining. We illustrate the ability to generate on-chip test stimuli and to implement a self-test strategy for the case of a complete application. This corresponds to an infrared imager that can be used in multiple applications such as overheating detection, night vision, and earth tracking for satellite positioning. The imager consists of an array of thermal pixels that sense an infrared radiation. Each pixel is implemented as a suspended membrane that contains several thermopiles along the different support arms. The on-chip test signal generation proposed requires only slight modifications and allows a production test of the imager with a standard test equipment, without the need of special infrared sources and the associated optical equipment. The test function can also be activated off-line in the field for validation and maintenance purposes.

A sweeping mode integrated fingerprint sensor with 256 tactile microbeams

This paper reports recent advances in the development of a tactile fingerprint sensor made by a CMOS compatible front side bulk micromachining technology. This device enables the measurement of a fingerprint by the way of a mechanical scanning principle of the finger roughness. While this sensing principle has shown good results on a first prototype of reduced width, we present here the design, fabrication and test of a new sensor. This sensor contains 256 pressure sensitive microbeams for a total length of 1.28 cm and is fully integrated with analog and mixed signal electronics. In this paper we will detail the general working principle of the tactile fingerprint sensor and the two prototypes that have been manufactured and tested with a special focus on the electronic architecture and the test results of the second prototype.

Towards design and validation of mixed-technology SOCs

This paper illustrates an approach to design and validation of heterogeneous systems. The emphasis is placed on devices which incorporate MEMS parts in either a single mixed-technology (CMOS + micromachining) SOC device, or alternatively as a hybrid system with the MEMS part in a separate chip. The design flow is general, and it is illustrated for the case of applications embedding CMOS sensors. In particular, applications based on finger-print recognition are considered since a rich variety of sensors and data processing algorithms can be considered. A high level multi-language/multi-engine approach is used for system specification and co-simulation. This also allows for an initial high-level architecture exploration, according to performance and cost requirements imposed by the target application. Thermal simulation of the overall device, including packaging, is also considered since this can have a significant impact in sensor performance. From the selected system specification, the actual architecture is finally generated via a multi-language co-design approach which can result in both hardware and software parts. The hardware parts are composed of available IP cores. For the case of a single chip implementation, the most important issue of embedded-core-based testing is briefly considered, and current techniques are adapted for testing the embedded cores in the SOC devices discussed.

Large range MEMS motion detection using integrated piezo-resistive silicon nanowire

Electrostatically actuated MEMS devices integrating surface micromachined silicon piezoresistive nanowires were batch processed to investigate a silicon nanowire detection scheme allowing an arbitrary choice of MEMS motion detection range and an increase of nanowire gauge factor measurement stress resolution. It is demonstrated that an in-plane MEMS displacements up to 180 nm with a resolution down to a few Angströms can be achieved as well as a MEMS resonance detection. Results are compared with ex-situ MEMS optical microscopy and in-situ capacitive measurements of MEMS displacement.

Modeling and Characterization of MicroPirani Vacuum Gauges Manufactured by a Low-Temperature Film Transfer Process

The novelty of this paper is the proof of functional microdevice fabrication using a recently developed low-temperature transfer process. The process is based on adhesion control of molded Ni microstructures on a donor wafer by using plasma-deposited fluorocarbon films. Low-temperature adhesive bonding of the microstructures on the target wafer using benzocyclobutene sealing enables mechanical tearing off from the donor wafer. Interest of this process for manufacturing microsensors is demonstrated here in the case of microbeams used as pressure sensors based on the Pirani principle. A simple analytical model is used to estimate the electrothermal behavior of the suspended microwires as a function of the ambient gas pressure. Estimations are compared to experimental measurements performed on Ni electroplated microwires of 550-1200-μm length, 10-μm width, and 0.7-7- μm thickness characterized into a vacuum chamber. These microsensors present a maximum of sensitivity in the range of 0.1-100 mbar, which is in line with standard performances of Pirani gauges. The presented results thus demonstrate the interest of a simple film transfer process for the elaboration of 3-D functional microstructures.

Thermal and electromechanical characterization of top-down fabricated p-type silicon nanowires*

In this paper we report thermal conductivity and piezoresistivity measurements of top-down fabricated highly boron doped (NA = 1.5 × 1019 cm−3) suspended Si nanowires. These measurements were performed in a cryogenic probe station respectively by using the 3 omega method and by in situ application of a longitudinal tensile stress to the nanowire under test with a direct four point bending of the Si nanowire die. Nanowires investigated have a thickness of 160 nm, a width in the 80–260 nm range and a length in the 2.5–5.2 μm range. We found that for these geometries, thermal conduction still obeys Fouriers law and that, as expected, the thermal conductivity is largely reduced when the nanowires width is shrunk, but, to a lower extent than published values for nanowires grown by vapor–liquid–solid (VLS) processes. While a large giant piezoresistance effect was evidenced by various authors when a static stress is applied, we only observed a limited nanowire size dependence of the piezoresistivity in our experiments where a dynamical mechanical loading is applied. This confirms that the giant piezoresistance effect in unbiased Si nanowires is not an intrinsic bulk effect but is dominated by surface related effects in agreement with the piezopinch effect model.

Self-testable CMOS thermopile-based infrared imager

This paper describes a CMOS-compatible self-testable uncooled InfraRed (IR) imager that can be used in multiple applications such as overheating detection, night vision, and earth tracking for satellite positioning. The imager consists of an array of thermal pixels that sense an infrared radiation. Each pixel is implemented as a front-side bulk micromachined membrane suspended by four arms, each arm containing a thermopile made of Poly/Al thermocouples. The imager has a pixel self-test function that can be activated off-line in the field for validation and maintenance purposes, with an on-chip test signal generation that requires only slight modifications in the pixel design. The self-test of a pixel takes about 15 ms. The area overhead required by the test electronics does not imply any reduction of the pixel fill factor, since the electronics fits in the pixel silicon boundary. However, the additional self-test circuitry contributes to a small increase in the thermal conductance of a pixel due to the wiring of a heating resistor over the suspended arms. The self-test capability of the imager allows for a production test with a standard test equipment, without the need of special infrared sources and the associated optical equipment. A prototype with 8 X 8 pixels is currently in fabrication for validation of the self-test approach. In this prototype, each pixel occupies an area of 200 X 200 micrometer2, with a membrane size of 90 X 90 micrometer2 (fill factor of 0.2). Simulation results indicate a pixel thermal conductance of 22.6 (mu) W/K, giving a responsivity of 138 V/W, with a thermocouple Seebeck coefficient that has been measured at 248 (mu) V/K for the 0.6 micrometer CMOS technology used. The noise equivalent power (considering only Johnson noise in the thermopile) is calculated as 0.18 nW.H-1/2 with a detectivity of 5.03 X 107 cm.Hz1/2.W-1, in line with current state-of-the-art. Since the imager may need to measure irradiation intensities below 1(mu) W, with a pixel output voltage much smaller than 1 mV, the analog front-end electronics incorporated on the chip uses modulation and correlated-double-sampling to reduce the amplifier offset and the noise floor.

CMOS-compatible micromachined tactile fingerprint sensor

We present in this paper a novel tactile fingerprint sensor composed by a single row of microbeams realized by the way of front side bulk micromachining from a standard CMOS circuit. When the user passes his finger on the sensor, the ridges and the valleys that compose the fingerprint induce deflections in the different microbeams. Using a piezoresistive gauge placed at their base, the deflections can be detected by means of a resistivity change. In addition of the MEMS part, this sensor includes in the same substrate the electronics control that allows to scan the row of microbeams and to amplify the signal from the gauges. A first prototype has been implemented and tested. This sensor dedicated to pixel tests includes three different rows composed by 38 microbeams that allow us to obtain a fingerprint image width of about 2 millimeters (spatial resolution of 50 micrometers i.e. 508 dpi).

Large-Range MEMS Motion Detection With Subangström Noise Level Using an Integrated Piezoresistive Silicon Nanowire

Electrostatically actuated microelectromechanical systems (MEMS) devices integrating a surface micromachined silicon nanowire were batch processed to investigate motion detection with a nanowire piezoresistive gauge. In the proposed implementation, the nanogauge is indirectly coupled to the MEMS structure through an intermediate coupling spring. This design allows an arbitrary choice of MEMS motion detection range and a resolution improvement of in situ nanowire gauge factor measurements. Using this approach, it is demonstrated that an in-plane MEMS displacements up to 180 nm with a noise level down to 0.7 Å/Hz1/2 can be achieved. MEMS resonance measurement in air and in vacuum by this method is also demonstrated. Results are compared with ex situ measurements of MEMS displacement by optical microscopy and by integrated capacitive detection.