Fábio M. Bayer

A DCT Approximation for Image Compression

An orthogonal approximation for the 8-point discrete cosine transform (DCT) is introduced. The proposed transformation matrix contains only zeros and ones; multiplications and bit-shift operations are absent. Close spectral behavior relative to the DCT was adopted as design criterion. The proposed algorithm is superior to the signed discrete cosine transform. It could also outperform state-of-the-art algorithms in low and high image compression scenarios, exhibiting at the same time a comparable computational complexity.

Improved 8-Point Approximate DCT for Image and Video Compression Requiring Only 14 Additions

Video processing systems such as HEVC requiring low energy consumption needed for the multimedia market has lead to extensive development in fast algorithms for the efficient approximation of 2-D DCT transforms. The DCT is employed in a multitude of compression standards due to its remarkable energy compaction properties. Multiplier-free approximate DCT transforms have been proposed that offer superior compression performance at very low circuit complexity. Such approximations can be realized in digital VLSI hardware using additions and subtractions only, leading to significant reductions in chip area and power consumption compared to conventional DCTs and integer transforms. In this paper, we introduce a novel 8-point DCT approximation that requires only 14 addition operations and no multiplications. The proposed transform possesses low computational complexity and is compared to state-of-the-art DCT approximations in terms of both algorithm complexity and peak signal-to-noise ratio. The proposed DCT approximation is a candidate for reconfigurable video standards such as HEVC. The proposed transform and several other DCT approximations are mapped to systolic-array digital architectures and physically realized as digital prototype circuits using FPGA technology and mapped to 45 nm CMOS technology.

DCT-like transform for image compression requires 14 additions only

A low-complexity 8-point orthogonal approximate discrete cosine transform (DCT) is introduced. The proposed transform requires no multiplications or bit-shift operations. The derived fast algorithm requires only 14 additions, less than any existing DCT approximation. Moreover, in several image compression scenarios, the proposed transform could outperform the well-known signed DCT, as well as state-of-the-art algorithms.

Low-complexity 8-point DCT approximations based on integer functions

The discrete cosine transform (DCT) is a central mathematical operation in several digital signal processing methods and image/video standards. In this paper, we propose a collection of twelve approximations for the 8-point DCT based on integer functions. Considered functions include: the floor, ceiling, truncation, and rounding-off functions. Sought approximations are required to meet the following specific criteria: (i) very low arithmetic complexity, (ii) orthogonality or quasi-orthogonality, and (iii) low-complexity inversion. By varying a scaling parameter, approximations could be systematically obtained and several existing approximations were identified as particular cases of the proposed methodology. Particular cases include the signed DCT and the rounded DCT. Four new quasi-orthogonal approximations were introduced and their practical relevance was demonstrated. All approximations were given fast algorithms based on matrix factorization methods. Proposed approximations are multiplierless; their computation requires only additions and bit-shifting operations. Additive complexity ranged from 18 to 24 additions. Obtained approximations were compared with the exact DCT and assessed in the context of JPEG-like image compression. As quality assessment measures, we considered the peak signal-to-noise ratio and the structural similarity index. Because its low-complexity and good performance properties, the proposed approximations are suitable for hardware implementation in dedicated architectures.

Image Compression via a Fast DCT Approximation

Discrete transforms play an important role in digital signal processing. In particular, due to its transform domain energy compaction properties, the discrete cosine transform (DCT) is pivotal in many image processing problems. This paper introduces a numerical approximation method for the DCT based on round-off techniques. The proposed method is a multiplierless technique with low arithmetic complexity. Emphasis was given to approximating the 8-point DCT. A fast algorithm for the introduced 8-point approximate transform was derived. An application in image compression was examined. In several scenarios, the utilization of the proposed method for image compression resulted in comparable or better performances, when compared to the usual DCT-based methodology.

Multiplier-free DCT approximations for RF multi-beam digital aperture-array space imaging and directional sensing

Multi-beamforming is an important requirement for broadband space imaging applications based on dense aperture arrays (AAs). Usually, the discrete Fourier transform is the transform of choice for AA electromagnetic imaging. Here, the discrete cosine transform (DCT) is proposed as an alternative, enabling the use of emerging fast algorithms that offer greatly reduced complexity in digital arithmetic circuits. We propose two novel high-speed digital architectures for recently proposed fast algorithms (Bouguezel, Ahmad and Swamy 2008 Electron. Lett. 44 1249?50) (BAS-2008) and (Cintra and Bayer 2011 IEEE Signal Process. Lett. 18 579?82) (CB-2011) that provide good approximations to the DCT at zero multiplicative complexity. Further, we propose a novel DCT approximation having zero multiplicative complexity that is shown to be better for multi-beamforming AAs when compared to BAS-2008 and CB-2011. The far-field array pattern of ideal DCT, BAS-2008, CB-2011 and proposed approximation are investigated with error analysis. Extensive hardware realizations, implementation details and performance metrics are provided for synchronous field programmable gate array (FPGA) technology from Xilinx. The resource consumption and speed metrics of BAS-2008, CB-2011 and the proposed approximation are investigated as functions of system word size. The 8-bit versions are mapped to emerging asynchronous FPGAs leading to significantly increased real-time throughput with clock rates at up to 925.6?MHz implying the fastest DCT approximations using reconfigurable logic devices in the literature.

A multiplication-free digital architecture for 16×16 2-D DCT/DST transform for HEVC

The discrete cosine transform (DCT) is widely employed in image and video coding applications due to its high energy compaction. In addition to 4×4 and 8×8 transforms utilized in earlier video coding standards, the proposed HEVC standard suggests the use of larger transform sizes including 16 × 16 and 32×32 transforms in order to obtain higher coding gains. Further, it also proposes the use of non-square transform sizes as well as the use of the discrete sine transform (DST) in certain intra-prediction modes. The decision on the type of transform used in a given prediction scenario is dynamically made, to obtain required compression rates. This motivated the proposed digital VLSI architecture for a multitransform engine capable of computing 16×16 approximate 2-D DCT/DST transform, with null multiplicative complexity. The relationship between DCT-II and DST-II is employed to compute both transforms using the same digital core, leading to reductions in both area and power. Closed-form relationship between the 16×16 transform and arbitrary smaller sized transform is presented, enabling the usability of this architecture to compute transforms of size 4 · 2P × 4 · 2q where 0 ≤ p, q ≤ 2.

A digital hardware fast algorithm and FPGA-based prototype for a novel 16-point approximate DCT for image compression applications

The discrete cosine transform (DCT) is the key step in many image and video coding standards. The eight-point DCT is an important special case, possessing several low-complexity approximations widely investigated. However, the 16-point DCT transform has energy compaction advantages. In this sense, this paper presents a new 16-point DCT approximation with null multiplicative complexity. The proposed transform matrix is orthogonal and contains only zeros and ones. The proposed transform outperforms the well-known Walsh?Hadamard transform and the current state-of-the-art 16-point approximation. A fast algorithm for the proposed transform is also introduced. This fast algorithm is experimentally validated using hardware implementations that are physically realized and verified on a 40?nm CMOS Xilinx Virtex-6 XC6VLX240T FPGA chip for a maximum clock rate of 342?MHz. Rapid prototypes on FPGA for a 8-bit input word size show significant improvement in compressed image quality by up to 1?2?dB at the cost of only eight adders compared to the state-of-art 16-point DCT approximation algorithm in the literature (Bouguezel et al 2010 Proc. 53rd IEEE Int. Midwest Symp. on Circuits and Systems).

Low-Power VLSI Architectures for DCT\/DWT: Precision vs Approximation for HD Video, Biomedical, and Smart Antenna Applications

The DCT and the DWT are used in a number of emerging DSP applications, such as, HD video compression, biomedical imaging, and smart antenna beamformers for wireless communications and radar. Of late, there has been much interest on fast algorithms for the computation of the above transforms using multiplier-free approximations because they result in low power and low complexity systems. Approximate methods rely on the trade-off of accuracy for lower power and/or circuit complexity/chip-area. This paper provides a detailed review of VLSI architectures and CAS implementations for both DCT/DWTs, which can be designed either for higher-accuracy or for low-power consumption. This article covers both recent theoretical advancements on discrete transforms in addition to an overview of existing VLSI architectures. The paper also discusses error free VLSI architectures that provides high accuracy systems and approximate architectures that offer high computational gain making them highly attractive for real-world applications that are subject to constraints in both chip-area as well as power. The methods discussed in the paper can be used in the design of emerging low-power digital systems having lowest complexity at the cost of a loss in accuracy?the optimal trade-off of computational accuracy for lowest possible complexity and power. A complete synopsis of available techniques, algorithms and FPGA/VLSI realizations are discussed in the paper.

Bartlett corrections in beta regression models

Abstract We consider the issue of performing accurate small-sample testing inference in beta regression models, which are useful for modeling continuous variates that assume values in (0,1), such as rates and proportions. We derive the Bartlett correction to the likelihood ratio test statistic and also consider a bootstrap Bartlett correction. Using Monte Carlo simulations we compare the finite sample performances of the two corrected tests to that of the standard likelihood ratio test and also to its variant that employs Skovgaards adjustment; the latter is already available in the literature. The numerical evidence favors the corrected tests we propose. We also present an empirical application.