Fabio Scalise

A receiver architecture conforming to the OFDM based digital video broadcasting standard for terrestrial transmission (DVB-T)

We present the architecture for a four chip integrated receiver decoder compliant with the European Digital Terrestrial Video Transmission standard (DVB-T); both 8 K and 2 K FFT size are supported. The paper focuses on the algorithms used for I/Q signal generation, OFDM demultiplexing, channel estimation, synchronization and channel decoding. The algorithms chosen are robust against the channel and interference conditions to be expected, including Rayleigh fading, co-channel interference from other (e.g. existing analogue) services and tuner imperfections. The channel SNR degradation arising in the digital part of the receiver-with imperfect channel estimation, synchronization and quantization-with respect to the BER at the output of the Viterbi decoder is not more than 2 dB from theory.

0.5-/spl mu/m CMOS circuits for demodulation and decoding of an OFDM-based digital TV signal conforming to the European DVB-T standard

In the context of digital terrestrial TV based on the DVB-T standard, four 0.5-/spl mu/m CMOS ICs (IC1-IC4) are presented. IC1 integrates an 8-K fast Fourier transform for orthogonal frequency division multiplexing demodulation, IC2 performs channel estimation/correction, and IC3 is a forward error corrector implementing a Viterbi and a Reed-Solomon decoder. IC4, which is based on a digital signal-processing core, performs the synchronization tasks of the complete receiver. These four chips have been designed and manufactured using a 0.5-/spl mu/m, 3,3-V, triple-metal CMOS process. Their global complexity is about 500 kgates of standard cells and 1.5 Mbits of memory, which represents a total die area of 435 mm/sup 2/ in 0.5 /spl mu/m. The total power dissipation is about 3.5 W when working at nominal frequency. More generally, these four ICs constitute the digital front-end part of a global chipset receiver (specified within the European project DVBird), also including an analog front end and a MPEG2 demultiplexer IC.

0.5 /spl mu/m CMOS circuits performing OFDM demodulation and channel estimation/correction for digital terrestrial TV applications

These two 0.5 /spl mu/m CMOS ICs result from DVBirds work. The first IC is dedicated to OFDM demodulation, the second, embedding 710 Kb of RAM, implements channel estimation and correction, a crucial issue in digital terrestrial TV applications. More generally, these two chips are intended for use in a global chipset receiver specified for the DVBird European project, along with a channel decoder IC and a synchronisation IC under development.

DVB-RCT: A new standard for interactive TV

Interactive digital TV services are now considered the key element to introduce digital TV services and to encourage customers to invest in new digital TV appliances. Some time ago, the Digital Video Broadcasting (DVB) forum, which already produced a harmonized family of technical standards including return channels using telecom networks technologies (PSTN, GSM, and ISDN), decided to engage in the work of defining return channels using the same medium as the broadcast downstream one. Thus, the cable and then the satellite platforms have been endowed with their dedicated return channel, and it is now possible to provide the remaining terrestrial platform with a dedicated return channel. The result of this work is called DVB-RCT (Return Channel for Terrestrial system) and is intended to provide standard specification for interactivity in the UHF/VHF bands. Using the newly defined DVB-RCT standard as a companion of the worldwide proven, recognized, and adopted terrestrial DVB system, DVB-T is no longer limited to unidirectional broadcast. It can become a true terrestrial wireless interactive system. Following a general presentation of the DVB-RCT technical specifications, two projects dealing with the future of the DVB-RCT standard are presented in this paper.