Felicia Ionescu

Application-level virtual memory management in real-time multiprocessor systems

The paper is dealing with the problem of virtual memory management in multiprocessor systems for real-time visualization of large virtual scenes. A virtual scene (or synthetic environment) is an integrated set of data elements that describe a defined geographical region. Large virtual scenes, including extended geographical regions, can be represented as a number of virtual segments, which usually, require a memory space much greater than physical memory of the image generator. The virtual memory scheme implemented by the operating system based on page swapping on page fault interrupt is not acceptable in realtime image generation and have to be replaced with an application-level memory management scheme. The physical memory is dynamically allocated to different segments of the virtual scene, depending on the relative position of the segment towards the observer position. We do not expect a memory miss interrupt in order to swap virtual segments, and we must prevent a memory miss situation by repeatedly execution of a mapping function, which allows that a virtual segment is present in physical memory when it is needed. The representation and visualization of large synthetic environments was studied and experimented on a Silicon Graphics multiprocessor, Onyx, with four MIPS R10000 processors and Infinite Reality graphic accelerator, under IRIX 6.4 operating system.

Improving Multimedia Techniques For Watermarking Color Images Using Cellular Automata

Watermarking technologies for multimedia data have quickly become an efficient way of dealing with copyright protection problems. Multimedia data protection is an important attribute in an application like eLearning, research or commercial web sites. This paper analysis the possible implication of cellular automata concept in watermarking algorithms. The authors propose a new watermarking technique for digital, color images based on semi-totalistic cellular automata. The proposed algorithm is a spatial, blind, semi-fragile method and offers an invisible mark to be detected. The paper presents actual and future possible usability of cellular automata in watermarking algorithms, with its advantages and disadvantages.

Solving System of Linear Equations in a Network of Workstations

In this article we propose an evaluation of the three common algorithms for solving linear system of equations: Gauss elimination, Gauss-Jordan without pivoting and Jacobi with dominant rows. The parallel design of the chosen algorithms is a compromise between the easies and elegant way to implement in MPI and the performance. The result confirmed that for a small number of low cost computers the speedup is acceptable for the Gauss elimination and Gauss-Jordan but for Jacobi with dominant rows if data is not already distributed it is better to implement the serial version

Image-Adaptive Watermarking Using JSEG Segmentation Technique

In this paper a new spatial masking method for watermarking techniques is proposed. The mask is computed using a local and a global reference to image texture. JSEG segmentation algorithm offers an estimation of color texture and some of its parameters are used in our masking method. The proposed masking method is used in a DCT-based watermarking algorithm and results are compared with JND (Just Noticeable Distortion) masking method.

Efficient Execution of Loosely Coupled Tasks in Grid Platforms

Grid technologies offer powerful computing resources for all domains, but the highly heterogeneous and dynamic nature of the Grids needs adaptable, scalable and extensible scheduling systems. In this paper we describe a dynamic, centralized scheduling mechanism based on Master-Worker paradigm for efficient execution of a set of loosely coupled tasks in a Grid environment. This mechanism offers high programmability features, adaptability and reliability towards processor failure. Experiments are presented that demonstrate the effectiveness of our approach.

DISTRIBUTED TRAINING OF UNIVERSAL MULTI-NESTED NEURONS

Training universal multi-nested neurons to represent arbitrary Boolean functions can be performed using a greedy-type stochastic optimization algorithm. However, the optimization search requires a long execution time so that the distribution of the computations on multiprocessors or distributed systems has to be considered in order to speedup the execution. This paper presents a distributed version of the stochastic optimization algorithm based on multiple search paths executed as separated processes on different hosts in a network of workstations. When a process reaches the global optimum, it stops all other processes, which abandon their search paths and a new optimization search (for a different Boolean function) can be started. Since the distributed processes interact only when a solution is found, the communication overhead is very low, which leads to high speedup and efficiency. The software support of the design is CORBA middleware, which allows efficient development of applications in heterogeneous distributed systems.

Coarse-Grain Parallelization of Test Vectors Generation on Multiprocessor Systems

The paper describes parallel implementation of automatic test vectors generation on multiprocessor systems using Boolean Difference Algorithm. The analysis of the algorithm points out that coarse-grain parallelization involves two types of data-dependencies that require different techniques for removing them: circuit model replication and mutual exclusion mechanisms. Toward balancing load of the work among processors, static and dynamic partitioning of computational task is studied. For each parallelization strategy, the theoretical speedup is estimated in order to select the most efficient implementation. The estimated and measured results show that the speed of automatic test generation can be significantly increased with parallel approach and this is an important achievement in the present technological context, with wide availability of multiprocessors stations.

Parallel Implementation of Image Filtering Algorithms in Multiprocessor Systems

Abstract This paper studies parallel implementation of some image processing algorithms (linear filtering and order filtering) on shared memory multiprocessor system. Each of these algorithms can be parallelized using data partitioning of the image (pixels matrix), and each partition is assigned to a separated thread, running on a processor of the system. Input data (original image) and output data (resulted image) are global, shared variables, accessed by all threads during the execution. This implementation involves a low parallel overhead and the speedup tends to the maximal allowed speedup (equals the number of processors), when the dimension of image increases. The experimental results confirm this behavior and the fact that image-filtering algorithms are well suited for parallel execution on shared memory multiprocessors

Parallel Implementation of Fast Hartley Transform (FHT) in Multiprocessor Systems

The purpose of this paper is to investigate the parallelization of one-dimensional Fast Hartley Transform (FHT) algorithm on shared memory multiprocessor systems. The computational dependencies of the sequential FHT algorithm are analyzed, in order to distribute the loops of the algorithm among multiple processes (threads), executed on the available processors of the system. The outer loop of the algorithm carries data dependencies between consecutive iterations and, for parallel execution, synchronization barriers are introduced. The results show that in the parallel execution of the FHT algorithm a significant speed-up is obtained and that the speed-up increases with the size of the input sequence.