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Dive into the research topics where Felipe M. G. França is active.

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Featured researches published by Felipe M. G. França.


international conference on parallel architectures and compilation techniques | 2000

The Dynamic Trace Memorization Reuse Technique

Amarildo T. da Costa; Felipe M. G. França; Eliseu M. Chaves Filho

Dynamic Trace Memoization (DTM) is a reuse technique that employs memoization tables to skip the execution of sequences of redundant instructions. For the SPECInt95 benchmark programs, DTM delivers performance improvements from 5% to 21% with an average of 9.3%. Moreover, DTM attains twice the average speedup of two other previously proposed reuse mechanisms for a subset of the SPECInt95 benchmarks.


Proteomics | 2011

Can the false-discovery rate be misleading?

Rodrigo Barboza; Daniel Cociorva; Tao Xu; Valmir Carneiro Barbosa; Jonas Perales; Richard H. Valente; Felipe M. G. França; John R. Yates; Paulo C. Carvalho

The decoy‐database approach is currently the gold standard for assessing the confidence of identifications in shotgun proteomic experiments. Here, we demonstrate that what might appear to be a good result under the decoy‐database approach for a given false‐discovery rate could be, in fact, the product of overfitting. This problem has been overlooked until now and could lead to obtaining boosted identification numbers whose reliability does not correspond to the expected false‐discovery rate. To overcome this, we are introducing a modified version of the method, termed a semi‐labeled decoy approach, which enables the statistical determination of an overfitted result.


Neural Networks | 2015

Multilingual part-of-speech tagging with weightless neural networks

Hugo C. C. Carneiro; Felipe M. G. França; Priscila M. V. Lima

Training part-of-speech taggers (POS-taggers) requires iterative time-consuming convergence-dependable steps, which involve either expectation maximization or weight balancing processes, depending on whether the tagger uses stochastic or neural approaches, respectively. Due to the complexity of these steps, multilingual part-of-speech tagging can be an intractable task, where as the number of languages increases so does the time demanded by these steps. WiSARD (Wilkie, Stonham and Aleksanders Recognition Device), a weightless artificial neural network architecture that proved to be both robust and efficient in classification tasks, has been previously used in order to turn the training phase faster. WiSARD is a RAM-based system that requires only one memory writing operation to train each sentence. Additionally, the mechanism is capable of learning new tagged sentences during the classification phase, on an incremental basis. Nevertheless, parameters such as RAM size, context window, and probability bit mapping, make the multilingual part-of-speech tagging task hard. This article proposes mWANN-Tagger (multilingual Weightless Artificial Neural Network tagger), a WiSARD POS-tagger. This tagger is proposed due to its one-pass learning capability. It allows language-specific parameter configurations to be thoroughly searched in quite an agile fashion. Experimental evaluation indicates that mWANN-Tagger either outperforms or matches state-of-art methods in accuracy with very low standard deviation, i.e., lower than 0.25%. Experimental results also suggest that the vast majority of the languages can benefit from this architecture.


International Journal of High Performance Systems Architecture | 2011

Trebuchet: exploring TLP with dataflow virtualisation

Tiago A. O. Alves; Leandro A. J. Marzulo; Felipe M. G. França; Vítor Santos Costa

Parallel programming has become mandatory to fully exploit the potential of multi-core CPUs. The dataflow model provides a natural way to exploit parallelism. However, specifying dependences and control using fine-grained instructions in dataflow programs can be complex and present unwanted overheads. To address this issue, we have designed TALM: a coarse-grained dataflow execution model to be used on top of widespread architectures. We implemented TALM as the Trebuchet virtual machine for multi-cores. The programmer identifies code blocks that can run in parallel and connects them to form a dataflow graph, which allows one to have the benefits of parallel dataflow execution in a Von Neumann machine, with small programming effort. We parallelised a set of seven applications using our approach and compared with OpenMP implementations. Results show that Trebuchet can be competitive with state-of-the-art technology, while providing the benefits of dataflow execution.


Biological Cybernetics | 2003

A generalized locomotion CPG architecture based on oscillatory building blocks

Zhijun Yang; Felipe M. G. França

Abstract. Neural oscillation is one of the most extensively investigated topics of artificial neural networks. Scientific approaches to the functionalities of both natural and artificial intelligences are strongly related to mechanisms underlying oscillatory activities. This paper concerns itself with the assumption of the existence of central pattern generators (CPGs), which are the plausible neural architectures with oscillatory capabilities, and presents a discrete and generalized approach to the functionality of locomotor CPGs of legged animals. Based on scheduling by multiple edge reversal (SMER), a primitive and deterministic distributed algorithm, it is shown how oscillatory building block (OBB) modules can be created and, hence, how OBB-based networks can be formulated as asymmetric Hopfield-like neural networks for the generation of complex coordinated rhythmic patterns observed among pairs of biological motor neurons working during different gait patterns. It is also shown that the resulting Hopfield-like network possesses the property of reproducing the whole spectrum of different gaits intrinsic to the target locomotor CPGs. Although the new approach is not restricted to the understanding of the neurolocomotor system of any particular animal, hexapodal and quadrupedal gait patterns are chosen as illustrations given the wide interest expressed by the ongoing research in the area.


Bioinformatics | 2013

Effectively addressing complex proteomic search spaces with peptide spectrum matching

Diogo Borges; Yasset Perez-Riverol; Fábio C.S. Nogueira; Gilberto B. Domont; Jesús Noda; Felipe da Veiga Leprevost; Vladimir Besada; Felipe M. G. França; Valmir Carneiro Barbosa; Aniel Sánchez; Paulo C. Carvalho

SUMMARY Protein identification by mass spectrometry is commonly accomplished using a peptide sequence matching search algorithm, whose sensitivity varies inversely with the size of the sequence database and the number of post-translational modifications considered. We present the Spectrum Identification Machine, a peptide sequence matching tool that capitalizes on the high-intensity b1-fragment ion of tandem mass spectra of peptides coupled in solution with phenylisotiocyanate to confidently sequence the first amino acid and ultimately reduce the search space. We demonstrate that in complex search spaces, a gain of some 120% in sensitivity can be achieved. AVAILABILITY All data generated and the software are freely available for academic use at http://proteomics.fiocruz.br/software/sim. CONTACT [email protected] SUPPLEMENTARY INFORMATION Supplementary data are available at Bioinformatics online.


digital systems design | 2009

GridRT: A Massively Parallel Architecture for Ray-Tracing Using Uniform Grids

Alexandre Solon Nery; Nadia Nedjah; Felipe M. G. França

In this paper, we propose an architecture, which we call GridRT, capable of dealing with the main features, such as shadowsandreflectionseffects, of Ray Tracingused forrendering three-dimensional scenes. This architecture achieves an efficient overall performance yet using a simple and compact massively parallel design. The design exploits the usage of Xilinx R ! Floating Point Operator IP Core and the spatial data structure of Regular Grids.


parallel computing | 2014

Couillard: Parallel programming via coarse-grained Data-flow Compilation

Leandro A. J. Marzulo; Tiago A. O. Alves; Felipe M. G. França; Vítor Santos Costa

Abstract Data-flow is a natural approach to parallelism. However, describing dependencies and control between fine-grained data-flow tasks can be complex and present unwanted overheads. TALM (TALM is an Architecture and Language for Multi-threading) introduces a user-defined coarse-grained parallel data-flow model, where programmers identify code blocks, called super-instructions, to be run in parallel and connect them in a data-flow graph. TALM has been implemented as a hybrid Von Neumann/data-flow execution system: the Trebuchet . We have observed that TALM’s usefulness largely depends on how programmers specify and connect super-instructions. Thus, we present Couillard , a full compiler that creates, based on an annotated C-program, a data-flow graph and C-code corresponding to each super-instruction. We show that our toolchain allows one to benefit from data-flow execution and explore sophisticated parallel programming techniques, with small effort. To evaluate our system we have executed a set of real applications on a large multi-core machine. Comparison with popular parallel programming methods shows competitive speedups, while providing an easier parallel programing approach. More specifically, for an application that follows the wavefront method, running with big inputs, Trebuchet achieved up to 4.7% speedup over Intel® TBB novel flow-graph approach and up to 44% over OpenMP.


symposium on computer architecture and high performance computing | 2003

The limits of speculative trace reuse on deeply pipelined processors

Maurício L. Pilla; Philippe Olivier Alexandre Navaux; A.T. da Costa; Felipe M. G. França; Bruce R. Childers; Mary Lou Soffa

Trace reuse improves the performance of processors by skipping the execution of sequences of redundant instructions. However, many reusable traces do not have all of their inputs ready by the time the reuse test is done. For these cases, we developed a new technique called reuse through speculation on traces (RST), where trace inputs may be predicted. We study the limits of RST for modern processors with deep pipelines, as well as the effects of constraining resources on performance. We show that our approach reuses more traces than the nonspeculative trace reuse technique, with speedups of 43% over a nonspeculative trace reuse and 57% when memory accesses are reused.


asian test symposium | 1998

A BIST scheme for asynchronous logic

Vladimir Castro Alves; Felipe M. G. França; Edson do Prado Granja

This work introduces a methodology to ease the implementation of BIST in asynchronous circuits. Scheduling by edge reversal (SER), a simple but powerful distributed synchronizer is used to implement a sequencer that allows testing the circuit at full speed. The methodology, which allows the detection of topological faults, is proved correct. Low hardware overhead and the absence of deadlocks are the main characteristics of the proposed methodology.

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Priscila M. V. Lima

Federal University of Rio de Janeiro

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Leandro A. J. Marzulo

Rio de Janeiro State University

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Nadia Nedjah

Rio de Janeiro State University

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Tiago A. O. Alves

Federal University of Rio de Janeiro

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Alexandre Solon Nery

Federal University of Rio de Janeiro

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Douglas de O. Cardoso

Federal University of Rio de Janeiro

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Massimo De Gregorio

Indian Council of Agricultural Research

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Zhijun Yang

Nanjing Normal University

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Lech Józwiak

Eindhoven University of Technology

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Maurício L. Pilla

Universidade Católica de Pelotas

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