Feng Quan-yuan

The Standard Particle Swarm Optimization Algorithm Convergence Analysis and Parameter Selection

Formal sufficient and necessary condition for the deterministic standard PSO algorithm to converge to equilibrium point, diverge to infinity or oscillate within a range is derived based on the discrete time dynamic system theory. General guidelines for parameters selection are provided according to the theory analysis. It is pointed out that, strictly speaking, the currently popular view that small inertia weight will facilitate a local search is not accurate enough. And the condition for the view to hold is given. The simulation results of particle trajectories are given to illustrate and verify the theory analysis.

Design of current limiting circuit in low dropout linear voltage regulator

A current limiting circuit applied in low dropout linear voltage regulator is designed and simulated. It can limit the maximum output current and the output short current of the regulator within 320mA and 30mA, respectively, and well realize the purpose of overcurrent protection. Prototype of the circuit can be fabricated using the 0.5/spl mu/m CMOS process.

Multiple-bits-slot reservation aloha protocol for tag identification

The Radio Frequency Identification (RFID) system consists of a reader and many tags. In the mobile RFID environment, consumers can obtain product-related information of tags by using readers which are installed in mobile phones. However, the tag collision problem is serious in this environment. This paper proposes a multiple-bits-slot reservation aloha protocol for handling this problem. In the protocol, the reader assigns reservation slots before allocating frame slots, and each tag generates a random sequence in its own reservation slot randomly selected by this tag to reserve a frame slot, then the reader efficiently captures the reservation collisions in reservation slots by Manchester coding. Accordingly, the protocol significantly reduces collision frame slots, and eliminates empty frame slots. Our performance evaluation shows that the proposed protocol outperforms other aloha-based protocols 1.

Hybrid modeling and control for buck-boost switching converters

The buck-boost switching converter is represented as a hybrid automaton model. The control problem of buck-boost switching converters is simplified to a guard selection problem. Meanwhile, a new hybrid control scheme is proposed to regulate the output voltage of a buck-boost dc-dc switching converter. The scheme covers a wide operating range under various load and line disturbances. In Comparing the minimum current through the inductor with zero and the output current, the algorithm differentiates the buck-boost switching converter into three operation modes, i.e., CCM-CISM (continues conduction mode Complete Inductor Supply Mode), CCM-IISM (continues conduction mode-Incomplete Inductor Supply Mode) and DCM-IISM (discontinues conduction mode-Incomplete Inductor Supply Mode). The guard selection calculation formulas of buck-boost converter are derived from the basic circuit laws. The hybrid automaton based control system is implemented using the state flow chart feature of MATLAB and extensive simulations are carried out to check the validity of the algorithm. Numerical results clearly bring out the advantages and effectiveness of the proposed control law under varying line voltage and load conditions.

A Security RFID Authentication Protocol Based on Hash Function

In RFID system, a critical issue is security and privacy problem. Firstly, several typical methods to against security and privacy problems are introduced, then based on this protocols, and aim at the shortages in them and other improved ones which provided by some literatures, we propose a new improved scheme based on hash function. The modified scheme resists illegal access, tracking, eavesdropping, impersonation and replay attack, fits for the case which the number of tags is large and is security and efficiency.

An undervoltage lockout of hysteretic threshold of zero temperature coefficients

This paper presents a method of merging the threshold voltage of zero temperature coefficients and comparative function into a single circuit. With application to undervoltage lockout circuit, it can reduce temperature sensitivity of threshold voltage and improve accuracy of threshold. Meanwhile, this undervoltage protection circuit realizes hysteretic threshold by a feedback control method so as to overcome disadvantage of poor interference rejection capability of single threshold. This undervoltage lockout circuit can be applied to DC-DC converter.

A novel thermal-shutdown protection circuit

A new type thermal-shutdown circuit has been designed in UMC 0.6um BiCMOS process. A feedback is used to solve the problem of thermal-oscillation and a shunt regulator circuit is used to solve the problem of the limit of the technology model. This thermal-shutdown circuit has simple structure, process insensitive and low power dissipation. It can be widely used for modularize in power management ICs. HSPICE simulation results shows that the circuit has excellent capability of power supply rejection and operated in power range from 2V to 12V. The error between Activation temperature and deactivation temperature remained basically unchanged for 29°C.

A low-power high reliability CMOS current limit circuit

A low-power high reliability CMOS current limit circuit is proposed, which can lower the circuits power dissipation, and enhance the reliability of the system with the application of foldback current limit circuit. This circuit is manufactured by normal 0.6/spl mu/m CMOS technology. The Hspice simulation results proved the feasibility of the circuit.

Design of PWM controller for monolithic boost converter

In the design of monolithic boost converter, it is difficult to design a fixed on-chip compensator to stabilize the converter system for a wide operation range. So the loop stability design for the monolithic boost converter becomes very challenging. In this paper, a PWM controller without error amplifier is investigated, and a PWM comparator is designed for it. It is demonstrated that this scheme facilitates the design of the loop-stability. The simulation results from HSPICE using UMC 0.6-mum BiCMOS process, verify the good functionality and performance of the circuit designed. Finally, the proposed method can also be widely utilized in switching-mode DC-DC converter.

A new configuration of differential CMOS LNA

This paper proposed a 2.5 GHz differential CMOS LNA which fabricated with the 0.18 mum CMOS process. This design used two-input and two-output architecture. Complying with the aspects of noise optimization, linear gain, impedance matching, the linearity and the design methodology of LNA are analyzed in detail, and the source inductive Ls, input matching capacitance and gate width W1. W2 is also discussed. By using the ADS software we make the simulation and get that the LNA consumes 5.4 mA current at 2 V supply voltage, and exhibits a linear gain of 15.053 dB, noise figure of 1.910 dB, S11 of -50.687 dB, S12 of -18.132 dB and the 1 dB gain compression point of 4.013 dBm.