Francis Devos

Multi-value voltage-to-voltage converter using a mutli-stage symmetrical charge pump for on-chip EEPROM programming

A fully integrated multi-stage symmetrical structure chargepump and its application to a multi-value voltage-to-voltage converterfor on-chip EEPROM programming are presented. The multi-valuevoltage-to-voltage converter is designed to offer two output voltages,power supply and triple power supply alternatively, which is neededfor a memory array. A dynamic analysis of the multi-stage symmetricalstructure charge pump and an optimization design in terms of circuitarea are also given. The circuit is implemented in a 1.2 μ CMOSprocess and the measurement results show that a voltage pulse as shortas 5 μs with a rise time of 3 μs is obtained. For a 5 V powersupply and with a resistive charge of 100 kΩ, the programmingoutput voltage can reach as high as 11 V and output current forprogramming is over 110 μA, which are high enough to program thememory cell.

Yet another analog 2D Gaussian convolver

A compact, discrete, capacitive, 2D Gaussian convolution network is presented by solving the heat equation in implicit finite difference form. A scalable 2D Gaussian convolution can be performed by controlling the iteration number. This capacitive network is especially adapted to real-time analog VLSI vision chips because of its simplicity and compactness.<<ETX>>

Architectures massivement paralleles pour la vision artificielle

RésuméCet article présente un certain nombre de machines massivement parallèles plus particulièrement destinées aux applications de traitement ďimages et de vision artificielle. Après une description de principes de traitements reposant sur divers concepts architecturaux (traitement pipeline, parallélisme des données), trois machines représentatives de classes architecturales sont particulièrement ètudiées : MPP (tableau de processeurs), la Connection Machine (hypercube) et Sphinx (pyramide). Une étude comparative de ľ implantation ďun probléme typique ďanalyse ďimages est réalisée. Ľarticle discute également de ľapport des techniques ď intégration de circuit à la réalisation de telles machines.AbstractThis paper presents some massively parallel computers, especially those dedicated to image processing and artificial vision. After a discussion on the information processing principle in an architectural point of view, we analyse three representative machines: MPP (processor array), Connection Machine (hypercube machine) and Sphinx (pyramid machine). A comparative study of the implementation of image analysis is carried out. This paper also emphasizes the influence of integration technologies to the realization of the massively parallel computers.

Investigation on an analog stereo retina for automobile applications

This paper presents an investigation on analog implementation of a stereovision algorithm suited to obstacle detection applications, especially to future intelligent vehicles or autonomous robots. The stereo algorithm is derived from the second algorithm of Marr (1979) by using local extrema extracted from DoG filtered images as matching primitives, instead of zero-crossing points. The DoG filter is realized by a extremely simple and precise capacitive IIR 2D spatial Gaussian filter, using only C and switching MOS-the most precise elements in CMOS technology. This capacitive network is much more precise than other implementations and simplifies considerably the algorithm-hardware conversion. The matching primitives extraction is implemented by using charge sharing and voltage comparison, no subtraction operation is needed. This stereo retina has been simulated with real-scene images taken from a running car on highway. The simulation results are very positive and a 128-pixel line retina has been designed and submitted to fabrication.

Co-programming: A tool for the development of software for massively parallel computers

Abstract This paper proposes a programming style named co-programming for the design of basic software for massively parallel computers. This programming style well suited for computers with MIMD and Multi-SIMD control strategy. It allows programmers to design the software as a set of C fonctions, communicating by objects (whenever necessary), which are to be executed in parallel on the real machine and concurrently on the machine simulator. Example applications on the SPHINX Multi-SIMD pyramid machine are presented.

A cumulative differential light-pulse detector using source-coupled MOS current switches

Abstract In this paper, a simple cumulative differential light-pulse detector is presented which uses an onginal switched-current (SI) memory in very weak inversion mode. This light-pulse detector differentiates the input light synchronously and cumulates the consecutvetempora differences, so a substantial detection gain can be obtained if the detection Cock matches that of the optica signal emissior, A test chip has shown a differential sensitivity of better than 2%. The pixel density of the image sensor is 400 pixels mm −2 with 1.0 mm CMOS single poly technology.

An analog smart sensor for active obstacle detection

An analog smart sensor for active obstacle detection in the future intelligent automobile is presented. It integrates the entire optoelectronic portion of the active obstacle detection system, from image acquisition to laser spot position coding, on a single silicon die. A 64-pixel prototype circuit has been designed and fabricated in a 3 /spl mu/m CMOS process. Some test results are discussed.<<ETX>>