Francisco D. Freijedo

Effects of Discretization Methods on the Performance of Resonant Controllers

Resonant controllers have gained significant importance in recent years in multiple applications. Because of their high selectivity, their performance is very dependent on the accuracy of the resonant frequency. An exhaustive study about different discrete-time implementations is contributed in this paper. Some methods, such as the popular ones based on two integrators, cause that the resonant peaks differ from expected. Such inaccuracies result in significant loss of performance, especially for tracking high-frequency signals, since infinite gain at the expected frequency is not achieved, and therefore, zero steady-state error is not assured. Other discretization techniques are demonstrated to be more reliable. The effect on zeros is also analyzed, establishing the influence of each method on the stability. Finally, the study is extended to the discretization of the schemes with delay compensation, which is also proved to be of great importance in relation with their performance. A single-phase active power filter laboratory prototype has been implemented and tested. Experimental results provide a real-time comparison among discretization strategies, which validate the theoretical analysis. The optimum discrete-time implementation alternatives are assessed and summarized.

Eliminating Ground Current in a Transformerless Photovoltaic Application

For low-power grid-connected applications, a single-phase converter can be used. In photovoltaic (PV) applications, it is possible to remove the transformer in the inverter to reduce losses, costs, and size. Galvanic connection of the grid and the dc sources in transformerless systems can introduce additional ground currents due to the ground parasitic capacitance. These currents increase conducted and radiated electromagnetic emissions, harmonics injected in the utility grid, and losses. Amplitude and spectrum of the ground current depend on the converter topology, the switching strategy, and the resonant circuit formed by the ground capacitance, the converter, the ac filter, and the grid. In this paper, the ground current in a 1.5-kW PV installation is measured under different conditions and used to build a simulation model. The installation includes a string of 16 PV panel, a full-bridge inverter, and an LCL filter. This model allows the study of the influence of the harmonics injected by the inverter on the ground current.

Multilevel Multiphase Space Vector PWM Algorithm

In the last few years, interest in multiphase converter technology has increased due to the benefits of using more than three phases in drive applications. Besides, multilevel converter technology permits the achievement of high power ratings with voltage limited devices. Multilevel multiphase technology combines the benefits of both technologies, but new modulation techniques must be developed in order to take advantage of multilevel multiphase converters. In this paper, a novel space vector pulsewidth modulation (SVPWM) algorithm for multilevel multiphase voltage source converters is presented. This algorithm is the result of the two main contributions of this paper: the demonstration that a multilevel multiphase modulator can be realized from a two-level multiphase modulator, and the development of a new two-level multiphase SVPWM algorithm. The multiphase SVPWM algorithm presented in this paper can be applied to most multilevel topologies; it has low computational complexity and it is suitable for hardware implementations. Finally, the algorithm was implemented in a low-cost field-programmable gate array and it was tested in a laboratory with a real prototype using a five-level five-phase inverter.

Analysis and Design of Resonant Current Controllers for Voltage-Source Converters by Means of Nyquist Diagrams and Sensitivity Function

The following two types of resonant controllers are mainly employed to obtain high performance in voltage-source converters: 1) proportional + resonant (PR) and 2) vector proportional + integral (VPI). The analysis and design of PR controllers is usually performed by Bode diagrams and phase-margin criterion. However, this approach presents some limitations when resonant frequencies are higher than the crossover frequency defined by the proportional gain. This condition occurs in selective harmonic control and applications with high reference frequency with respect to the switching frequency, e.g., high-power converters with a low switching frequency. In such cases, additional 0-dB crossings (phase margins) appear; therefore, the usual methods for simple systems are no longer valid. In addition, VPI controllers always present multiple 0-dB crossings in their frequency response. In this paper, the proximity to the instability of PR and VPI controllers is evaluated and optimized through Nyquist diagrams. A systematic method is proposed to obtain the highest stability and avoidance of closed-loop anomalous peaks: it is achieved by the minimization of the inverse of the Nyquist trajectory distance to the critical point, i.e., the sensitivity function. Finally, several experimental tests, including an active power filter that operates at a low switching frequency and compensates harmonics up to the Nyquist frequency, validate the theoretical approach.

Moving Average Filter Based Phase-Locked Loops: Performance Analysis and Design Guidelines

The phase-locked loops (PLLs) are probably the most widely used synchronization technique in grid-connected applications. The main challenge that is associated with the PLLs is how to precisely and fast estimate the phase and frequency, when the grid voltage is unbalanced and/or distorted. To overcome this challenge, incorporating moving average filter(s) (MAF) into the PLL structure has been proposed in some recent literature. An MAF is a linear-phase finite-impulse-response filter, which can act as an ideal low-pass filter, if certain conditions hold. The main aim of this paper is to present the control design guidelines for a typical MAF-based PLL. The paper starts with the general description of MAFs. The main challenge associated with using the MAFs is then explained, and its possible solutions are discussed. The paper then proceeds with a brief overview of the different MAF-based PLLs. In each case, the PLL block diagram description is shown, the advantages and limitations are briefly discussed, and the tuning approach (if available) is evaluated. The paper then presents two systematic methods to design the control parameters of a typical MAF-based PLL: one for the case of using a proportional-integral (PI) type loop filter (LF) in the PLL, and the other for the case of using a proportional-integral-derivative (PID) type LF. Finally, the paper compares the performance of a well-tuned MAF-based PLL when using the PI-type LF with the results of using the PID-type LF, which provides useful insights into their capabilities and limitations.

High-Performance Digital Resonant Controllers Implemented With Two Integrators

Resonant controllers are one of the highest performance alternatives for ac current/voltage control. The implementations based on two integrators are widely employed to achieve frequency adaptation without substantial computational burden. However, the discretization of these schemes causes a significant error both in the resonant frequency and in the phase lead provided by the delay compensation. Therefore, perfect tracking is not assured, and stability may be compromised. This paper proposes solutions for both problems without adding a significant resource consumption by correction of the roots placement. A simple expression to calculate the target leading angle, in delay compensation schemes, is also proposed to improve stability margins by means of a better accuracy than previous approaches. Experimental results obtained with a laboratory prototype corroborate the theoretical analysis and the improvement achieved by the proposed discrete-time implementations.

Design-Oriented Study of Advanced Synchronous Reference Frame Phase-Locked Loops

In grid-connected applications, the synchronous reference frame phase-locked loop (SRF-PLL) is a commonly used synchronization technique due to the advantages it offers such as ease of implementation and robust performance. Under ideal grid conditions, the SRF-PLL enables a fast and accurate phase/frequency detection; however, unbalanced and distorted grid conditions highly degrade its performance. To overcome this drawback, several advanced PLLs have been proposed, such as the multiple reference frame-based PLL, the dual second-order generalized integrator-based PLL, and the multiple complex coefficient filter-based PLL. In this paper, a comprehensive design-oriented study of these advanced PLLs is presented. The starting point of this study is to derive the small-signal model of the aforementioned PLLs, which simplifies the parameter design and the stability analysis. Then, a systematic design procedure to fine tune the PLLs parameters is presented. The stability margin, the transient response, and the disturbance rejection capability are the key factors that are considered in the design procedure. Finally, the experimental results are presented to support the theoretical analysis.

Dynamics Assessment of Advanced Single-Phase PLL Structures

Recently, several advanced phase-locked loop (PLL) techniques have been proposed for single-phase applications. Among these, the Park-PLL and the second-order-generalized-integrator-based PLL are very attractive, owing to their simple digital implementation, low computational burden, and desired performance under frequency-varying and harmonically distorted grid conditions. Despite the wide acceptance and use of these two advanced PLLs, no comprehensive design guidelines to fine-tune their parameters have been reported yet. Through a detailed mathematical analysis, it is shown that these two PLL structures are equivalent to each other, from the control point of view. Then, a linearized model is developed which is valid for both PLLs. The derived model significantly simplifies the stability analysis and the parameter design. To fine-tune the PLL parameters, a systematic design approach is suggested afterward, which guarantees a fast dynamic response, a high disturbance rejection ability, and a robust performance. Finally, the simulation and experimental results are presented to support the theoretical analysis.

Comparison of the FPGA Implementation of Two Multilevel Space Vector PWM Algorithms

Multilevel converters can meet the increasing demand of power ratings and power quality associated with reduced harmonic distortion and lower electromagnetic interference. When the number of levels increases, it is necessary to control more and more switches in parallel. Field programmable gate arrays (FPGAs), with their concurrent processing capability, are suitable for the implementation of multilevel modulation algorithms. Among them, space vector pulsewidth modulation algorithms offer great flexibility to optimize switching waveforms and are well suited for digital implementation. In this paper, two algorithms, 2-D and 3-D, are analyzed and implemented in an FPGA. In order to carry out the implementation, both algorithms have been described in very high speed integrated circuit hardware description language, partly hand coded, and partly automatically generated using the system generator tool. Both implementations are compared in terms of implementation complexity and logic resources required. Finally, test results with a neutral-point-clamped inverter are presented.

Tuning of Phase-Locked Loops for Power Converters Under Distorted Utility Conditions

This paper presents a novel approach in the tuning of phase-locked loops (PLLs) for power electronic converters. PLLs are implemented inside a higher level controller to estimate the grid-voltage phase angle and then control the energy transfer between the power converter and the AC mains. The tuning of the PLL is not a trivial task, particularly when considering power-quality phenomena. In a general way, PLLs with a low bandwidth (low-gain PLLs) are required when handling distorted voltages. It is analytically demonstrated in this paper that low-gain PLLs have more tradeoffs than high-gain PLLs (e.g., PLLs for communications); it is not possible to optimize the settling time for a phase jump without making slower the PLL response to frequency variations. Existing tuning methods do not take into account low-gain features, which may result in nonoptimum designs. The proposed PLL tuning methodology is based on inspection of frequency-domain diagrams and, contrary to the other existing tuning methods, takes into account ldquolow-gainrdquo dynamics. It assures an optimized performance in the presence of any kind of disturbances in the grid. From a practical point of view, the proposed tuning procedure is very intuitive for controller designs. Some significant design examples and experimental results, obtained from a discrete implementation (dSpace platform), are provided in order to validate the theoretical approaches.