Francois Hebert

A novel ESD super-clamp structure for TVS applications

This paper presents a new ESD clamp structure for transient voltage suppressor (TVS) applications that combines the advantages of avalanche diode and bipolar transistor clamps. The device structure consists of a non-snapback avalanche diode triggered vertical NPN transistor. The avalanche diode provides the fast trigger and current conduction path at low currents, while the vertical NPN bipolar transistor turn-on provides alternate low resistance path for current conduction at high currents. The snapback in the IV characteristics is minimized by matching the avalanche diode breakdown voltage VBD and the vertical NPN transistor open base collector-emitter breakdown voltage, BVCEO- Measurements on fabricated devices show consistent results with the theory. The TVS has low leakage currents (< 25 nAmps), negligible snapback in the output characteristics (<0.5 Volts) and excellent clamping voltage at high currents (13.1 Volts @ 30 Amps of TLP current). The presence of low doped base region also results in 35 % decrease in the TVS capacitance.