Franz Dielacher

A 76–84 GHz SiGe Power Amplifier Array Employing Low-Loss Four-Way Differential Combining Transformer

This paper presents holistic design of a novel four-way differential power-combining transformer for use in millimeter-wave power-amplifier (PA). The combiner with an inner radius of 25 μm exhibits a record low insertion loss of 1.25 dB at 83.5 GHz. It is designed to simultaneously act as a balanced-to-unbalanced converter, removing the need for additional BALUNs typically required in differential circuits. A complete circuit comprised of a power splitter, two-stage differential cascode PA array, a power combiner as well as input and output matching elements was designed and realized in SiGe technology with fT/fmax 170/250 GHz. Measured small-signal gain of at least 16.8 dB was obtained from 76.4 to 85.3 GHz with a peak 19.5 dB at 83 GHz. The prototype delivered 12.5 dBm output referred 1 dB compression point and 14 dBm saturated output power when operated from a 3.2 V dc supply voltage at 78 GHz.

SiGe BiCMOS technology and circuits for active safety systems

This paper provides an overview of the features and capabilities of state-of-the-art SiGe devices and BiCMOS technology for applications such as high-data-rate communications and pro-active safety systems like car-radar, identification and e-safety. The capabilities offered by SiGe-BiCMOS and microwave packaging enable the integration of complete transceivers on a chip or in a package even including the antenna. The criteria and trade-offs for the technology selection and system partitioning are described in the introduction. In addition to the electrical components performance, major criteria are addressed such as high reliability, long lifetime and high yield fabrication. Advanced packaging technologies are addressed as well, including embedded passive components and package co-design. Existing circuit design examples and future solutions for 77 GHz automotive radar are presented, followed by a multichannel receiver and a multichannel transmitter for mm-wave people scanners for airport security.

Reduction of Aliasing Effects of RF PWM Modulated Signals by Cross Point Estimation

The trend in transmitter systems is to move the digital domain closer toward the antenna using digital modulators and drivers to reduce circuit complexity and to save power. One promising approach is the use of RF pulse width modulation (RF PWM). Unfortunately purely digital discrete time RF PWM suffers from aliasing problems which limit the achievable resolution. For a 40 MHz bandwidth signal at 2.6 GHz carrier frequency for example the achievable signal quality is limited to ~ 43 dBc. This paper describes the root cause of this effect, an error in the determination of the cross points, due to the sampled nature of the signal and proposes a method to compensate for it. It is shown that by interpolating the signal and estimating the cross points the signal quality can be significantly improved. The interpolation is simplified by interpolating the decomposed outphasing signals instead of the full signal. This has the advantage that a constant instead of a phase modulated reference function can be used. It is shown that by simple cross point estimation the signal quality can already be improved to 65 dBc. When either considering a second modulator or when using a delta sigma like noise shaping architecture the signal quality can be further enhanced to 75 dBc.

A fully digital delay-line based GHz-range multimode transmitter front-end in 65-nm CMOS

A fully digital up-converter for wireless transmission in the GHz range is presented. The system consists of a polar modulator which uses PWM for the amplitude modulator (AM). Phase modulation (PM) is implemented by shifting the carrier in time. Both the PWM and the PM are implemented using asynchronous delay lines which allow time resolutions down to 10 ps without the need for high-frequent clock signals. The system is designed to drive two class-E power amplifiers with a power combiner. It supports a continuous range of carrier frequencies starting at 946 MHz and limited upwards only by the desired resolution. The modulator has been implemented in 65-nm CMOS. Results show error vector magnitude (EVM) values between 1.24% (−38.1 dB) at 946 MHz and 3.98% (−28.0 dB) at 2.4 GHz for 64-QAM OFDM signals.

Low Noise Amplifier With Integrated Balanced Antenna for 60 GHz Wireless Communications

The implementation of a dipole antenna co-designed and monolithically integrated with a low noise amplifier (LNA) on low resistivity Si substrate (20 Ω·cm) manufactured in 0.35 μm commercial SiGe HBT process with fT/fmax of 170 GHz and 250 GHz is investigated theoretically and experimentally. An air gap is introduced between the chip and a reflective ground plane, leading to substantial improvements in efficiency and gain. Moreover, conjugate matching conditions between the antenna and the LNA are exploited, enhancing power transfer between without any additional matching circuit. A prototype is fabricated and tested to validate the performance. The measured 10-dB gain of the standalone LNA is centered at 58 GHz with a die size of 0.7 mm × 0.6 mm including all pads. The simulated results showed antenna directivity of 5.1 dBi with efficiency higher than 70%. After optimization, the co-designed LNA-Antenna chip with a die size of 3 mm × 2.8 mm was characterized in anechoic chamber environment. A maximum gain of higher than 12 dB was obtained.

Predistortion of Digital RF PWM Signals Considering Conditional Memory

The trend in transmitter systems is to move the digital domain closer towards the antenna using digital modulators and drivers to reduce circuit complexity and to save power. A common assumption made is that they are capable of generating ideal pulses and thus do not suffer from analog imperfections. But the output signals of real drivers for high frequency operation are not perfectly rectangular anymore, which leads to distortion lowering the signal quality. In this paper the general properties of high frequency digital driver circuits operating at 2.6 GHz are analyzed and the impact of the different effects is presented. The predistortion of such drivers in the context of digital discrete time RF PWM modulators is studied. It has been found that conventional sample based predistortion can only correct the driver nonlinearity from -29 dBc to -49 dBc for the example considered using a 40 MHz bandwidth signal at 2.6 GHz. Therefore a special predistortion scheme considering the impact of pulses adjacent to the other samples is proposed. The mitigation of effects due to the discrete time nature of the signal is considered and discussed in detail. The capabilities of the proposed predistortion scheme are verified by extensive simulations as well as by measurements. By applying the proposed predistortion concept the spectral quality can be further improved to -66 dBc. In addition different scenarios with limited resolution and a carrier frequency offset are analyzed.

Multi-standard wideband OFDM RF-PWM transmitter in 40nm CMOS

A fully digital 0.9GHz-2.6GHz multimode modulator based on the principle of RF-PWM is presented. It makes use of a delay-line based phase modulator which delays an incoming LO-signal with a resolution of 4ps. The modulator is designed to drive highly efficient switching power amplifiers and support carrier frequencies over a wide range. The modulator has been implemented in 40nm CMOS technology. It achieves an EVM of better than -29dB for a 802.11g 64-QAM OFDM signal. It has also been tested with 40MHz single carrier 64-QAM modulated signals. The measured ACPR is below -30dB up to 2GHz and possible improvements are demonstrated.

A holistic design approach for systems on chip

We exemplify the possibilities of a holistic design approach for systems on chip. After recapitulating basic observations for next generation systems, we outline the advantages and challenges of a holistic design approach. The discussion is supported by real world examples.

Digital signal processing for data converters in mixed-signal systems

ZusammenfassungIn diesem Beitrag untersuchen die Autoren Datenumsetzer, die die Möglichkeiten von fortgeschrittener digitaler Signalverarbeitung aus- nutzen. Nach der Diskussion über Notwendigkeit und Aussichten der digitalen Signalverarbeitung für Datenumsetzer zur Erfüllung zukünftiger Systemspezifikationen werden anhand von drei Beispielen digital verbesserte Datenumsetzer erläutert: zeitverschachtelte Analog-zu-Digitalumsetzer, digitale Phasenregelkreise und vorverzerrte Leistungsverstärker. Zu diesem Zweck wird der Begriff des Datenumsetzers zu einem kooperierenden System erweitert, das zur Erfüllung der geforderten Spezifikationen digitale und analoge Vor- und Nachverarbeitungseinheiten umfasst.SummaryIn this paper, we investigate data converters that exploit the possibilities of advanced digital signal processing. After discussing the necessity and prospects of digital signal processing for data converters to comply with next generation system specifications, we demonstrate three examples of digitally enhanced data converters: time-interleaved analog-to-digital converters, all-digital phase-locked loops, and predistorted power amplifiers. To this end, we extend the term of a data converter to a cooperating system that includes digital and analog pre/postprocessing units to fullfil the required specification.

SiGe BiCMOS VCO with 27% tuning range for 5G communications

A SiGe BiCMOS VCO with a transformer-coupled varactor operating from 12 to 15.9 GHz is presented. The oscillator core features a phase noise as low as -117dBc/Hz at 1 MHz offset from the 14.2 GHz carrier while drawing 8 mA from the 3.3 V supply. The VCO shows a state-of-the-art FOMt of -190dBc/Hz. The trade-off for the technology selection is described in the introduction. The oscillator is tailored to the communication systems for the upcoming 5G applications. New radios that will operate from 6 GHz to as high as 100 GHz may be needed.