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Dive into the research topics where Frederick A. Perner is active.

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Featured researches published by Frederick A. Perner.


Nanotechnology | 2011

Lognormal switching times for titanium dioxide bipolar memristors: origin and resolution

Gilberto Medeiros-Ribeiro; Frederick A. Perner; Richard J. Carter; Hisham Abdalla; Matthew D. Pickett; R. Stanley Williams

We measured the switching time statistics for a TiO(2) memristor and found that they followed a lognormal distribution, which is a potentially serious problem for computer memory and data storage applications. We examined the underlying physical phenomena that determine the switching statistics and proposed a simple analytical model for the distribution based on the drift/diffusion equation and previously measured nonlinear drift behavior. We designed a closed-loop switching protocol that dramatically narrows the time distribution, which can significantly improve memory circuit performance and reliability.


symposium on vlsi technology | 2012

Integration of 4F2 selector-less crossbar array 2Mb ReRAM based on transition metal oxides for high density memory applications

Hyung Dong Lee; Sook-Joo Kim; K. Cho; Hyun Mi Hwang; Hyejung Choi; Ju-Hwa Lee; Sunghoon Lee; Heeyoul Lee; Jaebuhm Suh; Suock Chung; Y.S. Kim; Kwang-Ok Kim; W. S. Nam; J. T. Cheong; Jun-Ki Kim; S. Chae; E.-R. Hwang; Sung-Kye Park; Y. S. Sohn; C. G. Lee; H. S. Shin; Ki-Hong Lee; Kwon Hong; H. G. Jeong; K. M. Rho; Yong-Taik Kim; Sung-Woong Chung; Janice H. Nickel; Jianhua Yang; Hyeon-Koo Cho

4F2 selector-less crossbar array 2Mb ReRAM test chip with 54nm technology has been successfully integrated for high cell efficiency and high density memory applications by implementing parts of decoders to row/column lines directly under the cell area. Read/write specifications for memory operation in a chip are presented by minimizing sneak current through unselected cells. The characteristics of memory cell (nonlinearity, Kw >;8, Iop <;10uA, Vop<;60;3V), TiOx/Ta2O5, are modified for its working in a chip by adopting appropriate materials for a resistor stack and spacer. Write condition in a chip makes a critical impact on read margin and read/write operation in a chip has been verified.


Archive | 2003

Magnetic memory device

Thomas C. Anthony; Frederick A. Perner; Heon Lee; Robert G. Walmsley


Archive | 2001

Write circuit for large MRAM arrays

Frederick A. Perner; Kenneth J. Eldredge; Lung T. Tran


Archive | 2000

Magnetic random access memory (MRAM) device including differential sense amplifiers

Frederick A. Perner; Kenneth I Eldredge; Lung T. Tran


Archive | 1998

Arithmetic cell for field programmable devices

Frederick A. Perner


Archive | 2000

Equipotential sense methods for resistive cross point memory cell arrays

Lung T. Tran; Frederick A. Perner; James A. Brug


Archive | 1999

MRAM device including digital sense amplifiers

Frederick A. Perner; Kenneth J. Eldredge; Lung T. Tran


Archive | 2000

Differential sense amplifiers for resistive cross point memory cell arrays

Frederick A. Perner


Archive | 2004

Memory cell strings

Richard L. Hilton; Corbin L. Champion; Kenneth K. Smith; Frederick A. Perner

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