Fu-San Shyu

Optimal common-mode Voltage reduction PWM technique for inverter control with consideration of the dead-time effects-part I: basic development

The objective of this paper is to investigate the optimal common-mode voltage reduction pulsewidth modulation (PWM) technique when dead-time effect is taken into account. The effect of dead time on common-mode voltage for inverter control and the associated solution are discussed. Based upon these results, an optimal common-mode voltage reduction PWM technique, which requires no extra voltage/current sensors and compensation mechanism while not being affected by the dead time, is recommended. The common-mode voltage can be reduced to one-third for the inverter with diode front end, which is widely used in industry. Intensive measured results are presented to fully support the claims.

Virtual stage pulse-width modulation technique for multilevel inverter/converter

The main theme of this paper is to present a new pulse-width modulation (PWM) technique for multilevel inverter/converter control, which provides more degrees of freedom for specifying the cost function than that for step modulation technique, for a given hardware. Therefore, the presented technique eliminates more specified low order harmonics without resorting to the increase of hardware. In comparison with the selective harmonic elimination PWM technique, for the same number of eliminated low order harmonics, the presented technique provides the advantages of both lower total harmonic distortion (THD) and less switching. Simulation and experimental results are presented to confirm the above-mentioned claims.

New voltage balance technique for capacitors of symmetrical half-bridge converter with current mode control

It is well known that the current mode control has been widely applied to DC-DC converter for providing fast dynamic response capability and over current protection. However, this feature may give voltage un- balance issue for symmetrical half-bridge converter. The main theme of this paper is to present a novel voltage balance technique for the capacitors of symmetrical half- bridge converter with current mode control. The problem of voltage un-balance for this kind of converter will be described and followed by the proposal of the novel voltage balance technique. Finally, experimental results derived from a 48 V/3.3 V DC-DC converter will be presented to fully support our claims.

Optimal common-mode voltage reduction PWM technique for induction motor drives with considering the dead-time effects for inverter control

The objective of this paper is to investigate the optimal common-mode reduction PWM techniques when dead-time effect is taken into account. The effect of dead time on common-mode voltage for inverter control and the associated solution are discussed. Based upon these results, an optimal common-mode voltage reduction PWM technique, which requires no extra voltage/current sensors and compensation mechanism while not being affected by the dead time, is recommended. The common-mode voltage can be reduced to one third for the inverter with diode front end, which is widely used in the industry. Intensive measured results are presented to fully support the claims.

Novel sensorless PWM-controlled BLDCM drives without using position and current sensors, filter and center-tap voltage

The main theme of this paper is to present a novel sensorless brushless DC motor (BLDCM) drive without using position and current sensors, filter and center-tap voltage. The techniques for this drives, include initial position detection technique [Y.S. Lai et al., April 2003], loss-reduction PWM technique [Y.S. Lai et al., Oct. 2002], and back-EMF detection technique [Renesas Systems Solutions Asia Pte. Ltd., Sept. 2002]. The initial position detection technique provides initial position detection without using A/D converter, filter, current sensors, and hall sensors as shown in [Y.S. Lai et al., April 2003]. The PWM technique [Y.S. Lai et al., Oct. 2002] significantly reduces the conduction losses by invoking the concept of synchronous rectifier. The back-EMF detection technique offers noise-free back-EMF detection results for commutation control of inverter, while not using any filter and center-tap voltage. Experimental results derived from a DVD spindle BLDCM test system confirm the theoretical analysis.

Novel pulse-width modulation technique with loss reduction for small power brushless DC motor drives

It is well known that small power brushless DC motor (BLDCM) drives have been widely applied to the information technology industry, especially for fan and spindle applications. For small power applications of BLDCM drives, due to the use of battery and limited space for heat dissipation, reduction of power consumption is one of the main concerns for the development of pulse-width modulation (PWM) technique. This paper presents a novel PWM technique for small power BLDCM drives, which significantly reduces the conduction losses, and thereby dramatically reducing the heat dissipation. Comparative results with conventional PWM technique are fully explored to highlight the advantages of the presented novel technique. Experimental results derived from an FPGA-based spindle drive are presented to confirm the theoretical analysis.

Design and implementation of symmetrical half-bridge DC-DC converter

The main theme of this paper is to present the details of the design and implementation of a symmetrical half-bridge dc-dc converter. The input voltage ranges vary between 72 V and 36 V. The output voltage is 3.3 V and the output current is up to 30 Amps. For such high output requirement, current-doubler rectifier is used to reduce the losses. Details of the design will be described in this paper and measured results will be presented to confirm the design and implementation.

Novel torque boost technique for brushless DC motor drives without current sensor

The paper contributes to the presentation of a compensation technique for brushless DC motor drives. The presented technique overcomes the time delay issue caused by the time constant of stator windings of brushless DC motor. The time delay issue results in phase shift between back-EMF and phase current; and thereby reducing the output torque and efficiency. The basic idea for the presented technique is to shift the commutation instant forward such that the back-EMF and the current can be in phase even under the influence of time delay caused by stator windings. It will be shown that no current sensor is required for the presented torque compensation technique. Comparison results derived from experimental system with and without torque compensation technique are presented to support our claims. It will be shown that the presented technique increases efficiency in the whole output range.

Investigations into the performance of multilevel PWM methods at low modulation indices

This paper investigates the performance of several multilevel PWM techniques for inverters, which include step modulation technique, selective harmonic elimination PWM (SHEPWM) method, and the presented virtual stage PWM technique. In general, the level number of multilevel PWM techniques decreases in order to reach low modulation indices. However, the number of eliminated harmonics differs from each other. For the same hardware and level number of PWM waveform, the presented virtual stage PWM technique is superior to other techniques for eliminating more low order harmonics and/or having lower total harmonic distortion (THD). Simulation and experimental results are presented confirming the theoretical analysis.