Fumihiko Hayakawa

A 51.2 GOPS 1.0 GB/s-DMA single-chip multi-processor integrating quadruple 8-way VLIW processors

A 51.2-GOPS chip multi-processor integrates four 8-way VLIW embedded processors with 1.0 GB/s local-bus direct memory access. This IC completes MPEG2 MP@HL video-stream decoding at 68% of its processor capability without dedicated hardware. The 11.9 mm /spl times/ 10.3 mm chip is fabricated in a 90 nm 9M CMOS process and consumes 5 W at 533 MHz.

An 8-way VLIW embedded multimedia processor with advanced cache mechanism

An 8-way VLIW embedded multimedia processor is developed in 0.11 /spl mu/m 7-layer Cu/Al metal CMOS process technology. The processor achieved the peak performance of 2132 MIPS/2.1 GFLOPS/4.26 GOPS at 533 MHz. This processor equips 4-way integer and 4-way floating/media pipelines. Each media pipeline can execute a 4-parallel SIMD instruction, so 16-operations can be executed at a cycle. It also equips the data and instruction caches, and each of their size is 32 KB. The data cache has a non-aligned data access mechanism and an enhanced store operation mechanism, and a 9% performance improvement was verified. The instruction cache has a reconfigurable associativity mechanism, and achieved more than 12% of power consumption decrease. As a result, this processor achieved more than twice the performance over our previous processor. This processor enables MPEG2 MP@ML 2-stream decoding.

ARM Based Platform SoC for Embedded Applications

In these days embedded system needs Open Source Software (OSS) and open framework like as Open GL/Open CL because of better developing efficiency. This paper shows you about high performance SoC architecture for embedded system. This SoC shows lower power consumption in stand-by case and better performance about some applications. To reuse these hardware and software platform, custom SoCs can be developed easily in short period.