G. Brezeanu

High frequency characteristics and modelling of p-type 6H-silicon carbide MOS structures

Abstract This paper presents the high frequency electrical characteristics and modelling of Al/SiO 2 / p -type 6HSiC structures. The oxide was thermally grown under dry conditions. Capacitance and conductance vs bias and frequency measurements have been performed in daylight and exposing the capacitors to u.v. light. The experimental C m - V g and G m - V g characteristics show hysteresis effects, which are more important when the samples are exposed to 254 nm u.v. light. This behaviour can be explained in terms of interface traps. The MOS structure modelling is based on an interface trap model in which the interface trap levels are considered to be continuously distributed in the SiC bandgap and only charge exchange between interface trap levels and the SiC bands is allowed. From this formulation and from the G m - f characteristics, the interface state density and the interface trap time constant have been determined.

The electron irradiation effects on silicon gate dioxide used for power MOS devices

Abstract The work provides experimental results of high energy electron irradiation effects on silicon dioxide used for power MOS devices. A systematic increase of the threshold voltage has been observed in irradiated IGBT and VDMOS devices processed on Si 〈1 0 0〉 and Si 〈1 1 1〉 , respectively. The threshold voltage shift has been interpreted as a result of the accumulated charge in the gate oxide. Single event gate rupture has been observed and attributed to the recoil ion interaction with the gate SiO 2 . The result has been corroborated by reliability stress tests. After electron irradiation, an increase in breakdown voltage appeared on all devices which was attributed to a change in the surface impact ionisation coefficient. The change is most notable in devices processed on Si substrate with 〈1 1 1〉 orientation.

Extreme environment temperature sensor based on silicon carbide Schottky Diode

A high performance temperature sensor based silicon carbide power Schottky Barrier Diodes are developed for high temperature and harsh environment applications. The linear temperature dependence of the forward voltage and the exponential variation of the reverse voltage with the temperature are used as thermal sensing. The sensitivity is in range of 1.6 – 2.1mV/°C from forward bias and about 5uA/°C based on reverse characteristics.

Buried field rings - a novel edge termination method for 4H-SiC high voltage devices

This paper is concerned with a numerical study of a novel edge breakdown termination technique for 4H-SiC high voltage devices. Buried field rings (BFRs) are proposed to be used, for the first time, in SiC devices as an effective termination method and the concept is numerically demonstrated for 4H-SiC MESA JFET structures. By using 4 BFRs for a MESA JFET, a breakdown voltage of 1,590 V has been achieved, representing more than 90% of the ideal bulk breakdown value (1,750 V). The influence of the buried rings doping on the blocking mode behaviour and the effect of the SiC/SiO/sub 2/ interface charge on the breakdown voltage are studied. It is evidenced that the BFR termination offers a very stable blocking mode behaviour and the influence of processing conditions on its over-all performance is negligible. For comparison, some results for guard rings and junction termination extension are also presented.

A numerical comparison between MOS control and junction control high voltage devices in SiC technology

Abstract A comprehensive numerical comparison between MOS control (MOSFETs) and junction control (JFETs) devices in SiC technology is presented. The study is carried out using the MEDICI device simulator and covers an interval of blocking voltages ranging from 600 V to 6.5 kV. The gate oxide failure phenomenon in SiC trench MOSFETs is studied and the effect of wide trenches and rounded trench corners on the voltage blocking performance is investigated. The paper continues with a comparative study of SiC MOSFETs and SiC JFETs. The JFET chosen has a particular channel geometry featuring a highly doped buffer layer to reduce the on-state resistance. The influence of the buffer layer and the gate voltage on the JFET on-state/breakdown performance is carefully investigated. The study concludes with a mixed-mode simulation of the transient behaviour of a 1.2 kV SiC JFET–Silicon MOSFET pair in a CASCODE configuration as a viable alternative to a single switch (either SiC MOSFET or JFET).

Design of a reliable planar edge termination for SiC power devices

A reliable planar junction edge termination for SiC power devices, using a combination between a junction termination extension (JTE) with a field plate, containing a dielectric (AlN) with a higher dielectric constant than of silicon dioxide, is obtained by way of numerical simulation using ISE-TCAD software. The performance achieved by this combination includes a higher breakdown voltage and an electric field in the insulator below its critical electric field, thus avoiding premature breakdown. In addition, this termination has the advantage that it is not particularly sensitive to the interface charge.

Electrical characteristics modeling of large area boron compensated 6H-SiC pn structures

New models for the high frequency capacitance-voltage, C(V) and forward current-voltage, IF(VF) characteristics of a large area 6H-SiC boron compensated pn junction have been developed and implemented in an optimal parameter extraction program. The C(V) model and SIMS measurements confirm the presence of two type regions (pand n ˇ ) in the quasi- intrinsic layer induced by boron doping. The extracted values of the net doping of these zones (6ˇ10 10 12 cm ˇ3 ) are in good agreement with previously reported data. In contrast, the thickness of the quasi-intrinsic layer, about twice the epilayer width, proves the expansion of the quasi-intrinsic region in the substrate. The IF(VF) modeling includes a square law dependence of the forward current on VF, at high injection level. For the first time in the literature, saturation currents of SiC pn diodes is reported. The extracted saturation currents increase linearly with area, evidencing the beneficial eAect of boron diAusion for obtaining predictable large area devices.

Silicon carbide Schottky and ohmic contact process dependence

Abstract The paper investigates the impact of temperature and other annealing conditions on experimental Schottky and ohmic characteristics of fabricated Ni/4HSiC and Ti/4HSiC Schottky diodes. The backside ohmic contact is always Ni/4HSiC. The ohmic contact characteristics greatly improve if the annealing is performed at high temperature×time product. The measurements of Ni/4HSiC Schottky show a decrease of the Schottky barrier height when increasing the annealing temperature. In the case of the Ti–Schottky contacts, the lowest Schottky barrier height was obtained for diodes annealed into H 2 ambient.

An industrial temperature probe based on SiC diodes

A temperature probe based on 4H-SiC Schottky diodes is proposed. These diodes have been fabricated and characterized for temperature sensor applications. A conversion circuit to 4–20mA output current for ambient to maximum (400°C) input temperature was designed and tested.

Termination Structures for Diamond Schottky Barrier Diodes

A comprehensive study on the off-state performance of synthetic single crystal (SSC) diamond Schottky barrier diodes (SBDs) is the subject of this paper. Three termination structures suitable for unipolar diamond power devices are numerically investigated. Comparisons between the three terminations, based on blocking performance and area consumption are presented. Optimum design parameters derived from simulations are included for each structure. Experimental results of reverse-biased diamond SBDs for the first time with ramp angle termination are also presented