G. Cannatà

An ultralow noise preamplifier for low frequency noise measurements

Low frequency noise measurements are among the most sensitive tools for the investigation of the quality and of the reliability of semiconductor devices. The sensitivity that can be obtained depends on the background noise of the low noise preamplifier coupled to the device under test (DUT) that, at very low frequencies, is dominated by flicker noise. The low frequency noise produced by the DUT, on the other end, is very often the most interesting signal to be detected and analyzed. In this work we propose a very simple topology for the realization of a general purpose low noise preamplifier whose noise performances, at very low frequencies (below 10 Hz), are significantly better than those that can be obtained by the most popular commercial instrumentation. Indeed, a gain of 80 dB with a pass band extending from a few tens of mHz up to a few kHz with an equivalent input voltage noise as low as 14 nV/square root(Hz) (100 mHz), 1.4 nV/square root(Hz) (1 Hz), 1.0 nV/square root(Hz) (10 Hz), and 0.8 nV/square root(Hz) (1 kHz) are consistently obtained by using quite standard electronic components and with no need for trimming and/or calibration steps. Moreover, the junction field-effect transistor input stage of the amplifier is characterized by an equivalent input current noise below 4 fA/square root(Hz) in the entire bandwidth, resulting in negligible background noise degradation for DUT impedances in excess of 100 kohms.

Differential ultra low noise amplifier for low frequency noise measurements

Almost all low noise voltage preamplifier suitable for application in the field of Low Frequency Noise Measurements (either commercially available or proposed in the literature) are single ended input amplifiers. This means that one end of the measuring port of the Device Under Test (DUT) must be connected to common ground. This may be a severe limitation in many interesting measurement configurations, such as the case in which Kelvin connections to the DUT must be employed. In this paper we propose a simple design of a fully differential input ultra low noise amplifier with noise performances, in term of equivalent input voltage noise, comparable to those of the best single ended input amplifiers for low frequency noise measurements reported in the literature. Indeed, the amplifier we propose is characterized by a voltage gain of 80 dB, in the bandwidth from a few tens of mHz up to a few kHz, and by an equivalent input voltage noise as low as 14 nV/√Hz (100 mHz), 2 nV/√Hz (1 Hz), 1.2 nV/√Hz (10 Hz) and 1...

A new correlation method for high sensitivity current noise measurements.

The properties of a differential transconductance amplifier coupled with a four channel measurement system are exploited in order to reach a very high sensitivity in current noise measurements. In particular, it is demonstrated that, in proper conditions, the noise contributions coming from the active and passive devices that make up the transresistance amplifier can be virtually eliminated. Moreover, the proposed measurement method allows the evaluation of the impedance of the device under test from noise measurement data. Actual measurement results are also reported that demonstrate the effectiveness of the proposed approach.

Ultra-low-noise large-bandwidth transimpedance amplifier

SUMMARY Equivalent input current noise and bandwidth are the most relevant parameters qualifying a low-noise transimpedance amplifier. In the conventional topology consisting of an operational amplifier in a shunt-shunt configuration, the equivalent input noise decreases as the feedback resistor (RF), which also sets the gain, increases. Unfortunately, as RF increases above a few MΩ, as it is required for obtaining high sensitivity, the bandwidth of the system is set by the parasitic capacitance of RF and reduces as RF increases. In this paper, we propose a new topology that allows overcoming this limitation by employing a large-bandwidth voltage amplifier together with a proper modified feedback network for compensating the effect of the parasitic capacitance of the feedback resistance. We experimentally demonstrate, on a prototype circuit, that the proposed approach allows to obtain a bandwidth in excess of 100 kHz and an equivalent input noise of about 4 fA/, corresponding to the current noise of the 1 GΩ resistor that is part of the feedback network. The new approach allows obtaining larger bandwidth with respect to those obtained in previously proposed configurations with comparable background noise. Copyright

A Very Simple Low Noise Voltage Preamplifier For High Sensitivity Noise Measurements

An ultra low noise voltage preamplifier is presented that, while characterized by excellent noise performances, is based on a very simple topology. Indeed, the choice has been made of maintaining the component count to a minimum and of avoiding, by design, that any trimming or calibration step be required. This was done in order to make the realization of this piece of instrumentation as simple as possible for any researcher interested in noise measurements. The amplifier is AC coupled with a low corner frequency below 100 mHz and a useful bandwidth in the order of a few kHz. The voltage gain is 80 dB and the equivalent input voltage noise is 14, 1.4 and less than 1 nV/Hz at 100 mHz, 1 Hz and for f>10 Hz, respectively.

Configurable low noise amplifier for voltage noise measurements

The noise performances of monolithic operational amplifiers are generally insufficient for the realization of low noise amplifiers for applications in the field of low frequency voltage noise measurements. In order to obtain very low levels of equivalent input voltage and current noise, discrete JFETs input stages can be used, with the disadvantage of introducing a large input capacitance that can reduce the usable bandwidth in the case of large source impedances. In this work we propose to employ a modular design entirely based on monolithic operational amplifiers that allows, by paralleling and/or combining in a proper way a number of identical basic amplifier blocks, to reach different compromises in terms of background noise and input capacitance while enabling, at the same time, differential measurement configurations and/or cross correlation background noise reduction approaches.

On the calibration of AD and DA converters based on R/ßR ladder networks

In this paper we discuss the possibility of realizing high accuracy low cost AD and DA converters based on the properties of R/betaR (beta>2) ladder networks. A simple calibration algorithm is described that allows to reach high accuracy even in the case of large tolerances in the values of the resistors making up the ladder network. While the discussion is focused on resistive ladder networks, it is believed that our results can be extended to he case of MOS based ladder structures for the realization of highly compact, low cost, high accuracy integrated converters.

Design and Realization of High-Accuracy Static Analog Memories (SAMs) Using Low-Cost DA Converters

In this paper, the authors demonstrate that a proper connection of two or more low-cost low-accuracy digital-analog converters can be used for the realization of a high-accuracy static analog memory (SAM). High-accuracy SAM is a circuit behaving as a high-accuracy sample and hold block with indefinite hold capability. The proposed topology can be applied both at the board level and at the integrated-circuit level when designing compact and low-cost devices for automated test equipment. In fact, as it will be demonstrated in this paper, high accuracy can be guaranteed by design, without the need for any calibration procedure. The proposed approach can therefore be considered as a possible and advantageous alternative to the conventional methods employed for the realization of high-accuracy multiple-output programmable voltage or current sources. A prototype of the SAM, based on the proposed approach, has been assembled and tested. As it will be shown, the obtained experimental results fully confirm the validity of the approach

Automatic Offset Correction for Measurements in the Nanovolt Range

In this paper, the design of a new offset correction system employing a time-varying resistance as a probe for the detection of the sign and magnitude of the equivalent input offset of an operational amplifier in a series–shunt feedback configuration is presented. In order to considerably reduce the charge injection effects resulting from the switching of the MOS transistor that is used for the implementation of the time-varying resistance, we resort to a proper discrete time-sampling strategy for offset error detection. With respect to a previous topology, the new approach allows us to extend the useful amplifier bandwidth from a few hertz up to about 100 Hz with a gain boost from 201 to 1001. With the new approach, a residual offset on the order of a few tens of nanovolts is obtained, which allows us to classify the system as a nanovolt amplifier.

Nanovoltmeter amplifier for low level voltage measurements

A new design of an offset correction system that employs a time varying resistance as a probe for detecting the sign and magnitude of the equivalent input offset of an operational amplifier in a series-shunt feedback configuration is proposed. The time varying sense resistor is implemented by a MOS for which the problem of charge injection is considerably reduced by resorting to a proper discrete time sampling strategy for offset error detection. Significant design results include the extension of the useful amplifier bandwidth from a few Hz up to about one hundred Hz with a gain boost from 201 to 1001. With the new approach, a residual offset in the order of a few tens of nV is obtained which allows us to classify the system as a nanovolt amplifier.