G. De Falco
University of Naples Federico II
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Publication
Featured researches published by G. De Falco.
Microelectronics Reliability | 2012
M. Riccio; G. De Falco; Luca Maresca; Giovanni Breglio; Ettore Napoli; Andrea Irace; Yohei Iwahashi; P. Spirito
Abstract In this paper a novel 3D electro-thermal simulator for high power devices operating in avalanche condition will be presented. The proposed solution is based on two coupled systems: a 3D-FEM thermal simulator and a 2D electrical solver. The simulator has been implemented in MATLAB language. It is capable of simulating a large number of macro-cells composing a wide-area power devices operating in avalanche condition. The electrical solver uses a SPICE-like algorithm with a look-up-table description for every cell. The thermal problem is solved by a finite element method (FEM) in an iterative scheme with the electrical simulator. In order to prove the effectiveness of the simulator, we will present electro-thermal simulations in Unclamped Inductive Switching (UIS) conditions for a high power Trench-IGBT.
semiconductor thermal measurement and management symposium | 2014
G. Romano; M. Riccio; G. De Falco; Luca Maresca; Andrea Irace; Giovanni Breglio
This paper presents a new Infrared thermography system for thermal characterization of semiconductor electronic devices in transient and steady-state applications. The developed set-up is based on an IR camera having a 100Hz frame-rate at full-frame and a focal plane array of 640×512 InSb sensors. In order to extend the dynamic capabilities of the system a synchronization network generates timing signals to drive the experiment and trigger the IR-camera in an equivalent-time acquisition mode, up to 1MHz equivalent bandwidth. Moreover the proposed synchronized solution is able to detect thermal maps in a non-repetitive, single event, experiment. To prove the effectiveness of the proposed IR system, thermal measurements are presented on commercial Power-MOSFET, during short-circuit (SC) tests, and Power Schottky diode in unclamped inductive switching (UIS) test.
semiconductor thermal measurement and management symposium | 2014
G. De Falco; M. Riccio; G. Romano; Luca Maresca; Andrea Irace; Giovanni Breglio
In this work we present a novel simulation environment for analysis of electro-thermal interaction in power semiconductor devices. The developed solution is based on the joint use of ELDO-COMSOL simulators in an iterative scheme between an electrical 2D SPICE network and 3D FEM thermal solver. The power device is described with a multi-cellular approach using proper temperature dependent SPICE library and macro-cell concept. The thermal problem is solved on a 3D domain considering the full chip structure, including package and bond-wires. In order to validate the proposed approach, simulations during short-circuit tests have been performed considering a commercial STripFET II Power-MOSFET. Finally the simulation results have been compared with transient InfraRed (IR) thermal measurements proving the effectiveness of the new simulator.
international symposium on power semiconductor devices and ic's | 2014
M. Riccio; L. Maresca; G. De Falco; Giovanni Breglio; Andrea Irace; P. Spirito; Yohei Iwahashi
Actual design of power devices considers ruggedness in harsh operating conditions as mandatory to meet the always-increasing demand for lifetime device reliability, this being particularly true when the devices are used in safety-critical automotive applications. In this paper we show, for the first time, that a careful engineering of the standard cell geometry can shift the avalanche current from termination to active region and eventually lead to increased avalanche ruggedness without impacting the forward capability of a 1200 V-rated field-stop trench IGBT designed for power traction purposes.
international symposium on power electronics, electrical drives, automation and motion | 2012
G. De Falco; M. Gargiulo; Giovanni Breglio; Andrea Irace
Parallel resonant converter (PRC) behaves as a constant current (CC) source when operated at its resonant frequency; however, its output current slightly depends on output load changes. In practical applications - e.g. in LED drivers - a precisely regulated output value should be requested, also over a wide load range. To fix this shortcoming, in this paper we present a PRC-CC with variable switching frequency control implemented on microcontroller (μc), to regulate output current against load variations. Optimal design considerations are introduced to allow the adoption of such kind of control strategy, without losing the CC circuit behavior and zero voltage switching (ZVS) transitions. A 100 W, 2 A PRC-CC prototype was realized. Experimental results demonstrate the CC behavior of the controller, as well as the effective output current regulation.
international symposium on power semiconductor devices and ic s | 2016
M. Riccio; M. Tedesco; Paolo Mirone; G. De Falco; Luca Maresca; Giovanni Breglio; Andrea Irace
The compact SPICE modeling of Reverse Conducting IGBTs is presented in this paper. The proposed approach is based on a quasi-2D formulation with the joint use of IGBT and PiN diode sub-circuits. Lateral currents paths and turn-on forward delay are considered into the model. Self-heating effect for both IGBT and diode regions is take into account, enabling reliable electro-thermal analysis. The model is calibrated to fit experimental data of a commercial 20 A-1.2 kV rated device. As a compelling example to prove the effectiveness of the model, the results of an electro-thermal simulation on a quasi-resonant converter are compared with experiments.
international conference on microelectronics | 2014
L. Maresca; M. Cardonia; G. Avallone; M. Riccio; G. Romano; G. De Falco; Andrea Irace; Giovanni Breglio
The development of a new Short-Circuit (SC) tester for high current and high voltage power semiconductor devices is presented in this work. The proposed apparatus is provided with a Logical Control Unit (LCU) based on an FPGA digital circuit capable to control the system with 20ns programmable time resolution. The power side of the SC tester presents a series switch (SW) used to prevent undesired failure of the Device Under Test (DUT) and a 2.2mF capacitor bank designed with an optimized layout to strongly reduce parasitic stray inductance. Galvanic isolation between logical circuit and power side of the SC tester is ensured by using a custom optical fibers communication interface. Experimental measurements performed on commercial Trench-IGBTs (T-IGBTs) have confirmed the capability of the developed system to deliver high current pulses under supply voltage up to 1.7 kV.
international conference on microelectronics | 2014
P. Mirone; L. Maresca; M. Riccio; G. De Falco; G. Romano; Andrea Irace; Giovanni Breglio
In this work the use of a Semi-Insulating Polycrystalline Silicon (SIPOS)-based termination technique on PT-Trench IGBT is presented. The proposed solution has been applied to a 600V structure and the impact on the occupied area and the breakdown voltage has been evaluated by means of 2D TCAD simulations. The results of a parametric analysis on the junction depth and termination length have been compared with the case of a standard Floating Field Ring (FFR) technique, confirming the higher performances of the SIPOS termination structure combined with the Reduced Surface Field (RESURF) technique. A 52% reduction in the termination area has been demonstrated for the analyzed structure together with the slight impact of the junction depth on the breakdown voltage.
Microelectronics Reliability | 2013
M. Riccio; Alberto Castellazzi; G. De Falco; Andrea Irace
Microelectronics Reliability | 2014
G. De Falco; M. Riccio; Giovanni Breglio; Andrea Irace