G. L. Zhou

GaN grown on hydrogen plasma cleaned 6H-SiC substrates

We report epitaxial GaN layers grown on 6H‐SiC (0001) substrates. A two stage substrate preparation procedure is described which effectively removes oxygen from the SiC substrate surface without the need of elaborate high temperature processing. In the first step, dangling Si bonds on the substrate surface are hydrogen passivated using a HF dip before introduction into vacuum. Second, the substrate is treated with a hydrogen plasma reducing the amount of oxygen‐carbon bonding to below the x‐ray photoemission detection limit. Upon heating in the molecular beam epitaxy (MBE) growth chamber, the SiC substrates are observed to have a sharp (1×1) reconstruction with Kikuchi lines readily visible. GaN epilayers deposited on AlN buffer layers by plasma enhanced MBE show sharp x‐ray diffraction and photoluminescence peaks.

A comparative study of GaN epilayers grown on sapphire and SiC substrates by plasma‐assisted molecular‐beam epitaxy

We report structural, electrical, and optical data for GaN samples grown on both 6H‐SiC and sapphire substrates. A two‐stage substrate preparation procedure was employed for removing oxygen from 6H‐SiC and c‐plane sapphire substrates without the need for elaborate high‐temperature thermal degassing. Both sapphire and SiC substrates were treated with hydrogen plasma to reduce the surface contamination as evidenced by the observation of sharp (1×1) reconstruction RHEED (reflected high‐energy electrons diffraction) patterns. Thin AlN buffer layers were employed and the crystalline quality of GaN films was studied by temperature‐dependent Hall measurements, photoluminescence, and x‐ray diffraction. Layers with room‐temperature mobilities as high as 580 cm2/V s on SiC substrates were obtained.

p‐type zinc‐blende GaN on GaAs substrates

We report p‐type cubic GaN. The Mg‐doped layers were grown on vicinal (100) GaAs substrates by plasma‐enhanced molecular beam epitaxy. Thermally sublimed Mg was, with N2 carrier gas, fed into an electron‐cyclotron resonance source. p‐type zinc‐blende‐structure GaN films were achieved with hole mobilities as high as 39 cm2/V s at room temperature. The cubic nature of the films were confirmed by x‐ray diffractometry. The depth profile of Mg was investigated by secondary ions mass spectroscopy.

Low temperature growth of single-crystalline cubic SiC on Si(111) by solid source molecular beam epitaxy

Abstract Single-crystalline cubic SiC Layers have been grown on Si(111) substrates by molecular beam epitaxy (MBE) using graphite and silicon solid sources at relatively low substrate temperatures (800°C). The growth process employs initial carbonization of the (111) Si surface followed by direct deposition of both Si and C. Reflection high energy electron diffraction (RHEED), X-ray diffraction, cross-sectional and plan-view transmission electron microscopy (TEM), Auger electron spectroscopy (AES), and optical Nomarski microscopy were used to characterize the films. Atomic ratio of Si to C during the growth was found to be critical in terms of the crystalline quality as well as surface morphology of the films. To the extent of the instrumental accuracy, AES shows the SiC films to be stoichiometric. X-ray diffraction and TEM measurements confirm the crystalline nature of the SiC films.

Solid‐state reaction‐mediated low‐temperature bonding of GaAs and InP wafers to Si substrates

We report a low‐temperature wafer bonding method for the realization of integration of GaAs‐ and InP‐based optoelectronic devices with Si microelectronic devices. This method uses a Au‐Ge eutectic alloy as the bonding material sandwiched between GaAs and Si wafers, and between InP and Si wafers. The bonding process was carried out at 280–300 °C by taking advantage of the low‐temperature solid‐state reactions occurring at GaAs/Au‐Ge, InP/Au‐Ge, and Si/Au‐Ge interfaces. Both the simple mechanical test and standard thermal cycling test prove excellent structural integrity of the joined wafers. Structural analyses reveal only limited interfacial reactions as well as solid‐phase epitaxial regrowth of GeSi alloys on the Si substrate.

Observation of negative-differential-resistance in strained n-type Si/SiGe MODFETs

Abstract We observed negative-differential-resistance (NDR) in n -type Si/SiGe modulation-doped field effect transistors (MODFETs) with strained Si channel layers. It has been found that the NDR can only occur at gate biases above a certain voltage, and that the drain voltage for the onset of NDR is dependent on the Schottky gate bias. The observed NDR characteristics can be explained by a real space transfer of hot electrons from the strained Si channel to adjacent SiGe layers.

Si/SiGe modulation‐doped structures with thin buffer layers: Effect of substrate orientation

High quality Si (strained)/Si0.7Ge0.3 (relaxed) modulation‐doped structures incorporating unusually thin (700 nm) buffer layers were grown with molecular beam epitaxy at 700 °C. By utilizing (100) substrates misoriented toward (011) by 4°, the density of threading dislocations was reduced by over an order of magnitude as compared with conventional techniques. These layers produced exceptionally high Hall mobilities of 1790 cm2/V s at 300 K and 19 000 cm2/V s at 77 K on n‐type modulation‐doped heterostructures. The effect of substrate misorientation on threading dislocation density was investigated using transmission electron microscopy and Nomarski microscopy.

Mesoscopic caverns and nucleation twins formed in the growth of Co on Cu

Mesoscopic caverns in the form of facetted voids are observed to form when Cu pumps through pinholes to the outer surface during the epitaxial growth of fcc Co(111) on Cu(111) near 500 °C. We prove that the pinholes are located mainly at boundaries between fcc twin domains that occur with ABC and ACB stacking.

Wafer Bonding for Hybrid Circuit Technology Using Solid-State Reactions

In this study, we report a new wafer bonding technique for the integration of GaAs- and InP-based optical devices with prefabricated Si electronic devices in hybrid circuit technology. This technique uses a Au-Ge eutectic alloy as the bonding materials between GaAs and Si wafers, and between InP and Si wafers. This process takes advantage of the low temperature solid-state reactions at GaAs/Au-Ge, InP/Au-Ge, and Si/Au-Ge interfaces. The bonding was carried out by annealing the samples at 280–300°C in an alloying furnace. The reliability of the joined wafers was evaluated by both cleavage test and standard thermal cycling test. The joining interfaces were characterized by scanning electron microscopy and transmission electron microscopy. The results reveal that the bonding is achieved by low temperature reactions at the GaAs/Au-Ge and InP/Au-Ge interfaces as well as solid-phase epitaxial regrowth at the Si interfaces. The joined structure has very good integrity.