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Dive into the research topics where G. Ramana Murthy is active.

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Featured researches published by G. Ramana Murthy.


International Journal of Bio-inspired Computation | 2009

Hybrid particle swarm optimization algorithm with fine tuning operators

G. Ramana Murthy; M. Senthil Arumugam; Chu Kiong Loo

This paper introduces a new approach called hybrid particle swarm optimisation like algorithm (hybrid PSO) with fine tuning operators to solve optimisation problems. This method combines the merits of the parameter-free PSO (pf-PSO) and the extrapolated particle swarm optimisation like algorithm (ePSO). In order to accelerate the PSO algorithms to obtain the global optimal solution, three fine tuning operators, namely mutation, cross-over and root mean square variants are introduced. The effectiveness of the fine tuning elements with various PSO algorithms is tested through three benchmark functions along with a few recently developed state-of-the-art methods and the results are compared with those obtained without the fine tuning elements. From several comparative analyses, it is clearly seen that the performance of all the three PSO algorithms (pf-PSO, ePSO, and hybrid PSO) is considerably improved with various fine tuning operators and sometimes more competitive than the recently developed PSO algorithms.


International Journal of Bio-inspired Computation | 2009

On the optimal control of the steel annealing processes as a two-stage hybrid systems via PSO algorithms

M. Senthil Arumugam; G. Ramana Murthy; Chu Kiong Loo

The computation of optimal control variables for a two-stage steel annealing process which comprises of one or more furnaces is proposed in this paper. The heating and soaking furnaces of the steel annealing line form the two-stage hybrid systems. Three algorithms including particle swarm optimisation (PSO) with globally and locally tuned parameters (GLBest PSO), a parameter free PSO algorithm (pf-PSO) and a PSO-like algorithm via extrapolated PSO (ePSO) are considered to solve this optimal control problem for the two-stage steel annealing processes (SAP). The optimal solutions including optimal line speed, optimal cost and job completion time obtained through these three methods are compared with one another and those obtained via conventional PSO (cPSO) with time varying inertia weight (TVIW) and time varying acceleration coefficient (TVAC). From the results obtained through the five algorithms considered, the efficacy and validity of each algorithm are analysed.


international conference on intelligent and advanced systems | 2007

A novel effective particle swarm optimization like algorithm via extrapolation technique

M. Senthil Arumugam; G. Ramana Murthy; M. V. C. Rao; C X. Loo

A novel competitive approach to particle swarm optimization (PSO) algorithms is proposed in this paper. The proposed method uses extrapolation technique with PSO (ePSO) for solving optimization problems. By considering the basics of the PSO algorithm, the current particle position is updated by extrapolating the global best particle position and the current particle positions in the search space. The position of the particles in each iteration is updated directly without using the velocity equation. The position equation is formulated with the global best (gbest) position, personal or local best position (pbest) and the current position of the particle. The proposed method is tested with a set of five standard optimization bench mark problems and the results are compared with those obtained through three PSO algorithms, the canonical PSO (cPSO), the global-local best PSO (GLBest-PSO) and the proposed ePSO method. The cPSO includes a time varying inertia weight (TVIW) and time varying acceleration coefficients (TVAC) while the GLBest PSO consists of global-local best inertia weight (GLBest 1W) with global-local best acceleration coefficient (GLBestAC). The simulation results clearly elucidate that the proposed method produces the near global optimal solution. It is also observed from the comparison of the proposed method with cPSO and GLBest-PSO, the ePSO is capable of producing a quality of optimal solution with faster convergence rate. To strengthen the comparison and prove the efficacy of the proposed method, analysis of variance and hypothesis t-test are also carried out. All the results indicate that the proposed ePSO method is competitive to the existing PSO algorithms.


IEICE Electronics Express | 2012

A new 6-T multiplexer based full-adder for low power and leakage current optimization

G. Ramana Murthy; C. Senthilpari; P. Velrajkumar; Tien Sze Lim

Addition is a fundamental arithmetic operation which is used extensively in many very large-scale integration (VLSI) systems such as application-specific digital signal processing (DSP) and microprocessors. An adder determines the overall performance of the circuits in most of those systems. In this paper a 1-bit full adder cell which uses only six transistors has been proposed. In this design, three multiplexers and one inverter are used to minimize the transistor count and reduce power consumption. The power dissipation, propagation delay and power-delay product (PDP) are analyzed and compared with the existing adders using BSIM4 at 90 nm feature size. The results show that the proposed adder has both lower power consumption and low PDP value. The proposed full adder clearly outperforms other existing adders in its temperature sustainability behavior versus power dissipation, leakage current parameters. The low power and low transistor count makes the proposed 6T full adder cell a candidate for powerefficient applications.


Applied Mechanics and Materials | 2013

Monte-Carlo Analysis of a New 6-T Full-Adder Cell for Power and Propagation Delay Optimizations in 180nm Process

G. Ramana Murthy; C. Senthilpari; P. Velrajkumar; Tien Sze Lim

This paper presents a 1-bit full adder by using as few as six transistors per bit in its design. It is designed with a combination of multiplexing control input and Boolean identities. The proposed design features lower operating voltage, higher computing speed and lower energy consumption due to the efficient operation of 6-transistor adder cell. The design adopts Multiplexing with Control input technique to alleviate the threshold voltage loss problem commonly encountered in pass transistor logic design. The proposed design successfully embeds the buffering circuit in the full adder design and the transistor count is minimized. The improved buffering helps the design operate under lower supply voltage compared with existing works. It also enhances the speed performance of the cascaded operation significantly while maintaining the performance edge in energy consumption. For performance comparison, the proposed full adder is evaluated along with four existing full adders via extensive BSIM4 simulation. The simulation results, 180nm process models, indicate that the proposed design has lowest energy consumption per addition along with the performance edge in both speed and energy consumption makes it suitable for low power and high speed embedded processor applications.


Engineering Computations | 2014

Monte-Carlo analysis of a new 6-T full-adder cell for power and propagation delay optimizations in 180 nm process

G. Ramana Murthy; C. Senthilpari; P. Velrajkumar; Lim Tien Sze

This paper presents a 1-bit full adder by using as few as six transistors per bit in its design. It is designed with a combination of multiplexing control input and Boolean identities. The proposed design features lower operating voltage, higher computing speed and lower energy consumption due to the efficient operation of 6-transistor adder cell. The design adopts Multiplexing with Control input technique to alleviate the threshold voltage loss problem commonly encountered in pass transistor logic design. The proposed design successfully embeds the buffering circuit in the full adder design and the transistor count is minimized. The improved buffering helps the design operate under lower supply voltage compared with existing works. It also enhances the speed performance of the cascaded operation significantly while maintaining the performance edge in energy consumption. For performance comparison, the proposed full adder is evaluated along with four existing full adders via extensive BSIM4 simulation. The simulation results, 180nm process models, indicate that the proposed design has lowest energy consumption per addition along with the performance edge in both speed and energy consumption makes it suitable for low power and high speed embedded processor applications.


international conference on intelligent and advanced systems | 2007

On the optimal control of the steel annealing processes as a two-stage hybrid systems via different versions of PSO algorithms

M. Senthil Arumugam; G. Ramana Murthy; M. V. C. Rao; Chu Kiong Loo

The computation of optimal control variables for a two-stage steel annealing process (SAP) which comprises of one or more furnaces is proposed in this paper. The heating and soaking furnaces of the steel annealing line form two-stage hybrid systems. Three algorithms including particle swarm optimization (PSO) with globally and locally tuned parameters (GLbest PSO), a parameter free PSO algorithm (pf-PSO), and a PSO like algorithm via extrapolation (ePSO) are considered to solve this optimal control problem for the two-stage steel annealing processes (SAP). The optimal solutions including optimal line speed, optimal cost, and job completion time obtained through these three methods are compared with each other and those obtained via conventional PSO (cPSO) with time varying inertia weight (TVIW) and time varying acceleration coefficient (TVAC). From the results obtained through the four algorithms considered, the efficacy and validity of each algorithm are analyzed.


World Academy of Science, Engineering and Technology, International Journal of Electrical, Computer, Energetic, Electronic and Communication Engineering | 2012

Interconnect Analysis of a Novel Multiplexer Based Full-Adder Cell for Power and Propagation Delay Optimizations

G. Ramana Murthy; C. Senthilpari; Lim Tien Sze


International Journal of Numerical Modelling-electronic Networks Devices and Fields | 2018

A comprehensive analytical study of electrical properties of carbon nanotube field-effect transistor for future nanotechnology

Ajay Kumar Singh; B. Naresh Kumar; G. Ramana Murthy; C.M.R. Prabu


international conference on humanoid nanotechnology information technology communication and control environment and management | 2017

ARM based 32bit precision angular degree movement sensing for any rotary shaft mechanism

L. B. Pestanas; G. Ramana Murthy; A. Kumar Singh

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Chu Kiong Loo

Information Technology University

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