Ganesh Jayakumar

Electrical properties of sub-100 nm SiGe nanowires

In this study, the electrical properties of SiGe nanowires in terms of process and fabrication integrity, measurement reliability, width scaling, and doping levels were investigated. Nanowires were fabricated on SiGe-on oxide (SGOI) wafers with thickness of 52 nm and Ge content of 47%. The first group of SiGe wires was initially formed by using conventional I-line lithography and then their size was longitudinally reduced by cutting with a focused ion beam (FIB) to any desired nanometer range down to 60 nm. The other nanowire group was manufactured directly to a chosen nanometer level by using sidewall transfer lithography (STL). It has been shown that the FIB fabrication process allows manipulation of the line width and doping level of nanowires using Ga atoms. The resistance of wires thinned by FIB was 10 times lower than STL wires which shows the possible dependency of electrical behavior on fabrication method.

Characterization of bonding surface and electrical insulation properties of inter layer dielectrics for 3D monolithic integration

We investigate the bonding and electrical insulation properties of oxide layers for use in 3D monolithic integration via direct wafer bonding. Low surface roughness layers deposited on 100 mm Si wafers by atomic layer deposition (ALD) at 200 °C-350 °C, provide with adequate layer transfer bonding interfaces. Wafer scale IV measurements were performed to investigate the leakage current. We demonstrate that ALD oxide can function as a reliable bonding surface and also exhibit leakage current values below the nA range. Both properties are important pillars for a successful 3D monolithic integration.

Silicon nanowires integrated in a fully depleted CMOS process for charge based biosensing

We describe a silicon nanowire (SiNW) biosensor fabricated in a fully depleted SOI CMOS process. The sensor array consists of 32 by 32 pixel matrix (1024 pixels or test sites) and 8 input-output (I/O) pins. In each pixel single crystalline SiNW with 60 by 20 nm cross-section area is defined using sidewall transfer lithography (STL) in the SOI layer. The key advantage of the design is that 1024 individual SiNWs can be read-out sequentially and used for real-time charge based detection of molecules in liquids or gases.

Fabrication and characterization of silicon nanowires using STL for biosensing applications

We present a sidewall transfer lithography (STL) process to fabricate silicon nanowires using the CMOS compatible materials SiO2, SiN and α-Si. The STL process is implemented using a single cluster tool for reactive ion etching (RIE) and plasma enhanced chemical vapor deposition (PECVD) with a maximum process temperature of 400 °C. Using three lithography masks, single and multiple silicon nanowires connected to contact areas can be defined. By optimizing layer thicknesses, RIE and deposition conformity we demonstrate wafer scale definition of 60 nm wide silicon nanowires using I-line stepper lithography. The silicon nanowires exhibit excellent characteristics for biosensing applications with subthreshold slopes of 75 mV/dec and a high on/off current ratio of more than 105.

Monolithic Wafer Scale Integration of Silicon Nanoribbon Sensors with CMOS for Lab-on-Chip Application

Silicon ribbons (SiRi) have been well-established as highly sensitive transducers for biosensing applications thanks to their high surface to volume ratio. However, selective and multiplexed detection of biomarkers remains a challenge. Further, very few attempts have been made to integrate SiRi with complementary-metal-oxide-semiconductor (CMOS) circuits to form a complete lab-on-chip (LOC). Integration of SiRi with CMOS will facilitate real time detection of the output signal and provide a compact small sized LOC. Here, we propose a novel pixel based SiRi device monolithically integrated with CMOS field-effect-transistors (FET) for real-time selective multiplexed detection. The SiRi pixels are fabricated on a silicon-on-insulator wafer using a top-down method. Each pixel houses a control FET, fluid-gate (FG) and SiRi sensor. The pixel is controlled by simultaneously applying frontgate (VG) and backgate voltage (VBG). The liquid potential can be monitored using the FG. We report the transfer characteristics (ID-VG) of N- and P-type SiRi pixels. Further, the ID-VG characteristics of the SiRis are studied at different VBG. The application of VBG to turn ON the SiRi modulates the subthreshold slope (SS) and threshold voltage (VTH) of the control FET. Particularly, N-type pixels cannot be turned OFF due to the control NFET operating in the strong inversion regime. This is due to large VBG (≥25 V) application to turn ON the SiRi sensor. Conversely, the P-type SiRi sensors do not require large VBG to switch ON. Thus, P-type pixels exhibit excellent ION/IOFF ≥ 106, SS of 70–80 mV/dec and VTH of 0.5 V. These promising results will empower the large-scale cost-efficient production of SiRi based LOC sensors.

Fabrication and characterization of high-K dielectric integrated silicon nanowire sensor for DNA sensing application(Conference Presentation)

1D silicon nanowires (SiNW) are attractive for charge based DNA sensing applications due to their small size and large surface to volume ratio. An ideal portable biosensor is expected to have repeatable and reliable sensitivity, selectivity, low production cost and small feature size. Instead of using tools such as e-beam that are capital and time intensive, we propose a low cost CMOS self-aligned-double-patterning I-line lithography process to fabricate 60 nm wide SiNW. DNA probes are grafted on a thin dielectric layer that is deposited on top of the SiNW surface. Here we used HfO2 instead of the usual SiO2. Indeed, compared to SiO2, HfO2 has been reported to have higher amount of OH groups on its surface leading to enhanced signal quality. We also report preliminary biosensor characterizations. After HfO2 functionalization and single-stranded DNA probe grafting onto the SiNWs, the sensors were first put in contact with fluorophore labelled complementary DNA targets in order to test the efficiency of DNA hybridization optically. Then, a sequence of hybridization, de-hybridization and re-hybridization steps was followed by Id-Vg measurements in order to measure the electrical response of the sensors to target DNA as well as recycling capability. After each step, SiNW devices exhibited a threshold voltage shift larger than device-to-device dispersion, showing that both complementary DNA hybridization and de-hybridization can be electrically detected. These results are very encouraging as they open new frontiers for heterogeneous integration of liquid interacting array of nano sensors with CMOS circuits to fabricate a complete lab on chip.