George C. Goldsmith
Air Force Research Laboratory
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Featured researches published by George C. Goldsmith.
Technologies for Synthetic Environments: Hardware-in-the-Loop Testing X | 2005
Owen M. Williams; George C. Goldsmith; Robert G. Stockbridge
Numerous infrared scene projection technologies have been investigated since the 1970s. Notably, from the late 1980s the development of the first resistor array infrared projectors gained leverage from the strong concurrent developments within focal plane array imaging technology, linked by the common need for large integrated circuits comprising a 2-dimensional array of interconnected unit cells. In the resistor array case, it is the unit cell comprising the resistively heated emitter and its dedicated drive circuit that determines the projector response to its associated scene generator commands. In this paper we review the development of resistor array technology from a historical perspective, concentrating on the unit cell developments. We commence by describing the technological innovations that forged the way, sharing along the way stories of the successes and failures, all of which contributed to the steady if somewhat eventful growth of the critical knowledge base that underpins the strength of todays array technology. We conclude with comments on the characteristics and limitations of the technology and on the prospects for future array development.
Technologies for Synthetic Environments: Hardware-in-the-Loop Testing VIII | 2003
George C. Goldsmith; W. Larry Herald; Ricky A. Erickson; Walter S. Irvine; Paul R. Mackin; Paul Bryant; Brian Lindberg
The development of a new generation PC-based array control electronics (PACE) system was completed during the first quarter of 2003 in the Kinetic Kill Vehicle Hardware-in-the-loop (KHILS) facility. This system replaces the bulky VME-based system that was the previous standard with more compact digital control electronics using field-programmable gate array (FPGA) technology hosted on a personal computer. The analog interface electronics (AIE) were redesigned to eliminate obsolete components and miniaturize the package for better compatibility with harsh environments. The resulting PACE system supports both Santa Barbara Infrared Inc. (SBIR) and Honeywell Technology Centers (HTCs) 512 x 512 legacy emitter array infrared projection devices as well as SBIRs upcoming 1024 x 1024 and next-generation 512 x 512 arrays. Two FPGA-based PCI boards enable this system to reconfigure the inputs, processing and outputs of the projection electronics through firmware loaded from the control PC. The increased flexibility provides potential for additional real-time functions such as distortion correction, convolution and calibration to be implemented along with nonuniformity correction (NUC) techniques by simply reconfiguring firmware. This paper describes the capabilities of the new PACE system in terms of current and future hardware-in-the-loop (HITL) requirements.
Technologies for Synthetic Environments: Hardware-in-the-Loop Testing VIII | 2003
Breck A. Sieglinger; James D. Norman; William M. Meshell; David S. Flynn; Rhoe A. Thompson; George C. Goldsmith
For many types of infrared scene projectors, differences in the outputs of individual elements are one source of error in projecting a desired radiance scene. This is particularly true of resistor-array based infrared projectors. Depending on the sensor and application, the desired response uniformity may prove difficult to achieve. The properties of the sensor used to measure the projector outputs critically affect the procedures that can be used for nonuniformity correction (NUC) of the projector, as well as the final accuracy achievable by the NUC. In this paper we present a description of recent efforts to perform NUC of an infrared projector under “adverse” circumstances. For example, the NUC sensor may have some undesirable properties, including: significant random noise, large residual response nonuniformity, temporal drift in bias or gain response, vibration, and bad pixels. We present a procedure for reliably determining the output versus input response of each individual emitter of a resistor array projector. This NUC procedure has been demonstrated in several projection systems at the Kinetic Kill Vehicle Hardware-In-the-Loop Simulator (KHILS) including those within the KHILS cryogenic chamber. The NUC procedure has proven to be generally robust to various sensor artifacts.
Technologies for Synthetic Environments: Hardware-in-the-Loop Testing VIII | 2003
Owen M. Williams; Leszek Swierkowski; August J. Huber; James D. Norman; George C. Goldsmith
A new infrared projector emitter response curve-fitting procedure suitable for generating nonuniformity coefficients capable of being applied in existing real-time processing architectures is introduced. The procedure has been developed through detailed analysis of a Honeywell Multi-Spectral Scene Projector (MSSP) sparse array data set, combined with an appreciation of the underlying physical processes that lead to the generation of infrared radiance.
Technologies for Synthetic Environments: Hardware-in-the-Loop Testing XI | 2006
Owen M. Williams; Leszek Swierkowski; Breck A. Sieglinger; George C. Goldsmith
Resistor array infrared projectors offer the unique potential of simultaneously covering both a wide apparent temperature range and providing fine temperature resolution at low output levels. The temperature resolution capability may not be realized, however, if the projector error sources are not controlled; for example, residual nonuniformity after nonuniformity correction (NUC) procedures have been applied, temporal noise in analog drive voltages and quantization at several points in the projection system, all of which may introduce errors larger than the desired resolution. In this paper the temperature resolution limits are assessed in general. In particular, the quantization errors are assessed and the post-NUC residual nonuniformity levels required for achievement of fine temperature resolution are calculated.
Technologies for Synthetic Environments: Hardware-in-the-Loop Testing VII | 2002
Owen M. Williams; Leszek Swierkowski; Rhoe A. Thompson; George C. Goldsmith; W. Larry Herald
An alternative class of infrared projector real-time nonuniformity correction processor is introduced, based on the concept that the fundamental role of the processor is to reverse each of the projector processing steps as the input DAC voltage word is converted into infrared signal radiance output. The design is developed by assessment of the sequence of processes occurring within the projector and is tested by simulation. It is shown that there is potential for high fidelity nonuniformity correction across the infrared dynamic range without the need for the introduction of curve-fitting breakpoints.
Technologies for Synthetic Environments: Hardware-in-the-Loop Testing VII | 2002
David S. Flynn; Rhoe A. Thompson; George C. Goldsmith
The Honeywell resistor arrays produce radiance outputs, which are observed to have a strong non-linear dependence on the voltage out of the digital-to-analog-converters (DACs). In order for the projection system to run in a radiometrically calibrated mode, the radiances in the image generator must be transformed with exactly the inverse of the resistor array response function before they are sent to the DACs. Representing the image values out of the image generator and the values into the DACs with quantized, digital values introduces errors in the radiance out of the resistor array. Given the functional form of the emitter array response and the number of bits used to represent the image values, these errors in the radiometric output due to the quantization effects can be calculated. This paper describes the calculations and presents results for WISP, MSSP, and the new extended range and standard range BRITE II arrays.
Technologies for Synthetic Environments: Hardware-in-the-Loop Testing XI | 2006
W. Larry Herald; Paul R. Mackin; Charles M. Niswonger; Rhoe A. Thompson; George C. Goldsmith
Recent advances in Field-Programmable Gate Arrays (FPGAs) and innovations in firmware design have allowed more complex image processing algorithms to be implemented entirely within the FPGA devices while substantially improving performance and reducing development time. Firmware innovations include a unique memory buffer architecture and the use of floating-point math. The design discussed takes advantage of these advances and innovations to implement a geometric transformation algorithm with bilinear interpolation for applications such as distortion correction. The firmware and hardware developed in this effort support image sizes of up to 1024x1024 pixels at 200 Hz and pixel rates of 216 MHz with versions available that support oversized input images.
Technologies for Synthetic Environments: Hardware-in-the-Loop Testing XI | 2006
Steven Lawrence Solomon; Robert Ginn; Stephen A. Campbell; Maryam Jalali; George C. Goldsmith
Joule heated resistive emitter arrays are presently limited to pixel temperatures on the order of 1000 K. A phase 2 SBIR program is underway to develop material sets with the goal of increasing the operating temperatures of these arrays by up to a factor of 3. Preliminary work indicates that transition metal oxides and carbides are the most promising materials for 3000 K pixel temperatures. An overview of the project and current status is presented. Thin films will be deposited by numerous vendors using a variety of techniques, and annealed at ultra-high temperatures in vacuum to select the most stable materials. Test emitter pixel arrays will be fabricated and tested.
Technologies for Synthetic Environments: Hardware-in-the-Loop Testing IX | 2004
Steven Lawrence Solomon; George C. Goldsmith; Mikhel Hawkins
The next generation of resistively heated emitter pixels will be required to attain MWIR apparent temperatures on the order of 2000K, which will require pixel temperatures on the order of 3000K. Numerical simulations have been carried out to determine the material properties required to support the desired performance. Research has been performed to identify a set of potential materials for fabricating these devices based on materials science, existing thermophysical properties, thermodynamic stability and compatibility with thin film processing.